Disambiguates what the string represents to help translators more easily
understand what it is that they're translating. While we're at it, we
can move the code to its own function, so that we don't need to specify
the same string twice.
First of all they are foundamentally broken. As our convention is that std::string is always UTF-8, these functions assume that the multi-byte character version of TString (std::string) from windows is also in UTF-8, which is almost always wrong. We are not going to build multi-byte character build, and even if we do, this dirty work should be handled by frontend framework early.
We always use unicode internally. Any dirty work of conversion with other codec should be handled by frontend framework (Qt). Further more, ShiftJIS/CP1252 are not special (they are not code set used by 3ds, or any guest/host dependencies we have), so there is no reason to specifically include them
4e6848d A32/ir_emitter: Bugfix: ExceptionRaised was producing incorrect PC
41ba9fd value: Move ImmediateToU64() to be a part of Value's interface
c6a6271 reg_alloc: Emit AVX instructions where able
aedd32a abi: Emit AVX instructions where able
f2d9337 a64_exclusive_monitor: Loosen memory ordering requirements
7ca709d travis: Make macOS builds use Xcode 10
14dd45e Fix VShift terminology
88554c4 emit_x64_vector: AVX512 implementation of EmitVectorLogicalVShiftS16
ab4e316 emit_x64_vector: AVX512 implementation of EmitVectorLogicalVShiftS64
0ea84f3 emit_x64_vector: AVX2 implementation of EmitVectorLogicalVShiftS32
c77a2c5 emit_x64_vector: AVX512 implementation of EmitVectorLogicalVShiftU16()
e9441fd emit_x64_vector: AVX2 implementation of EmitVectorLogicalVShiftU64()
0e9c33c emit_x64_vector: AVX2 implementation of EmitVectorLogicalVShiftU32()
8f85274 emit_x64_vector: SSSE3 variant of EmitVectorCountLeadingZeros8()
be05e75 Merge pull request #397 from VelocityRa/dec-shift-fix
bc328fc decoders: Cast to correctly-sized type before shifting
9c3d2d1 a64_emit_x64: Lowercase PAGE_SIZE
f538d29 emit_x64_vector_floating_point: SSE4.1 implementation of EmitFPVectorToFixed
1603a6e emit_x64_vector_floating_point: EmitFPVectorRoundInt: Use FCODE
2e1ccaf emit_x64_vector: AVX implementation for EmitVectorCountLeadingZeros8
555bfda emit_x64_vector: SSE implementation of EmitVectorCountLeadingZeros16
71c2589 externals: Update Xbyak to 5.73
1ec1b2f Squashed 'externals/xbyak/' changes from 1de435ed..42462ef9
Now that we have all of the rearranging and proper structure sizes in
place, it's fairly trivial to implement svcGetThreadContext(). In the
64-bit case we can more or less just write out the context as is, minus
some minor value sanitizing. In the 32-bit case we'll need to clear out
the registers that wouldn't normally be accessible from a 32-bit
AArch32 exectuable (or process).
This will be necessary for the implementation of svcGetThreadContext(),
as the kernel checks whether or not the process that owns the thread
that has it context being retrieved is a 64-bit or 32-bit process.
If the process is 32-bit, then the upper 15 general-purpose registers
and upper 16 vector registers are cleared to zero (as AArch32 only has
15 GPRs and 16 128-bit vector registers. not 31 general-purpose
registers and 32 128-bit vector registers like AArch64).
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