shader_decode: Stub RRO_C, RRO_R and RRO_IMM
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@ -140,6 +140,15 @@ u32 ShaderIR::DecodeArithmetic(BasicBlock& bb, u32 pc) {
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Operation(OperationCode::Select, NO_PRECISE, condition, min, max));
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break;
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}
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case OpCode::Id::RRO_C:
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case OpCode::Id::RRO_R:
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case OpCode::Id::RRO_IMM: {
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// Currently RRO is only implemented as a register move.
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op_b = GetOperandAbsNegFloat(op_b, instr.alu.abs_b, instr.alu.negate_b);
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SetRegister(bb, instr.gpr0, op_b);
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LOG_WARNING(HW_GPU, "RRO instruction is incomplete");
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break;
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled arithmetic instruction: {}", opcode->get().GetName());
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}
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