yuzu-emu
/
yuzu-mainline
Archived
1
0
Fork 0

shader/bfi: Implement register-constant buffer variant

It's the same as the variant that was implemented, but it takes the
operands from another source.
This commit is contained in:
ReinUsesLisp 2020-01-27 01:19:00 -03:00
parent 05df4a8c94
commit 137a8aa55c
2 changed files with 7 additions and 2 deletions

View File

@ -1675,6 +1675,7 @@ public:
BFE_C, BFE_C,
BFE_R, BFE_R,
BFE_IMM, BFE_IMM,
BFI_RC,
BFI_IMM_R, BFI_IMM_R,
BRA, BRA,
BRX, BRX,
@ -2098,6 +2099,7 @@ private:
INST("0100110000000---", Id::BFE_C, Type::Bfe, "BFE_C"), INST("0100110000000---", Id::BFE_C, Type::Bfe, "BFE_C"),
INST("0101110000000---", Id::BFE_R, Type::Bfe, "BFE_R"), INST("0101110000000---", Id::BFE_R, Type::Bfe, "BFE_R"),
INST("0011100-00000---", Id::BFE_IMM, Type::Bfe, "BFE_IMM"), INST("0011100-00000---", Id::BFE_IMM, Type::Bfe, "BFE_IMM"),
INST("0101001111110---", Id::BFI_RC, Type::Bfi, "BFI_RC"),
INST("0011011-11110---", Id::BFI_IMM_R, Type::Bfi, "BFI_IMM_R"), INST("0011011-11110---", Id::BFI_IMM_R, Type::Bfi, "BFI_IMM_R"),
INST("0100110001000---", Id::LOP_C, Type::ArithmeticInteger, "LOP_C"), INST("0100110001000---", Id::LOP_C, Type::ArithmeticInteger, "LOP_C"),
INST("0101110001000---", Id::LOP_R, Type::ArithmeticInteger, "LOP_R"), INST("0101110001000---", Id::LOP_R, Type::ArithmeticInteger, "LOP_R"),

View File

@ -17,10 +17,13 @@ u32 ShaderIR::DecodeBfi(NodeBlock& bb, u32 pc) {
const Instruction instr = {program_code[pc]}; const Instruction instr = {program_code[pc]};
const auto opcode = OpCode::Decode(instr); const auto opcode = OpCode::Decode(instr);
const auto [base, packed_shift] = [&]() -> std::tuple<Node, Node> { const auto [packed_shift, base] = [&]() -> std::pair<Node, Node> {
switch (opcode->get().GetId()) { switch (opcode->get().GetId()) {
case OpCode::Id::BFI_RC:
return {GetRegister(instr.gpr39),
GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)};
case OpCode::Id::BFI_IMM_R: case OpCode::Id::BFI_IMM_R:
return {GetRegister(instr.gpr39), Immediate(instr.alu.GetSignedImm20_20())}; return {Immediate(instr.alu.GetSignedImm20_20()), GetRegister(instr.gpr39)};
default: default:
UNREACHABLE(); UNREACHABLE();
return {Immediate(0), Immediate(0)}; return {Immediate(0), Immediate(0)};