yuzu-emu
/
yuzu-mainline
Archived
1
0
Fork 0
Code

shader: Fix MOV(reg), add SHL variants and emit neg and abs instructions

This commit is contained in:
ReinUsesLisp 2021-02-22 02:45:50 -03:00 committed by ameerj
parent 274897dfd5
commit 18a766b362
4 changed files with 11 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/shader_recompiler/backend/spirv/emit_spirv.h
View File

@ -181,8 +181,8 @@ void EmitIAdd64(EmitContext& ctx);
Id EmitISub32(EmitContext& ctx, Id a, Id b);
void EmitISub64(EmitContext& ctx);
Id EmitIMul32(EmitContext& ctx, Id a, Id b);
void EmitINeg32(EmitContext& ctx);
void EmitIAbs32(EmitContext& ctx);
Id EmitINeg32(EmitContext& ctx, Id value);
Id EmitIAbs32(EmitContext& ctx, Id value);
Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift);
void EmitShiftRightLogical32(EmitContext& ctx);
void EmitShiftRightArithmetic32(EmitContext& ctx);

8
src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
View File

@ -58,12 +58,12 @@ Id EmitIMul32(EmitContext& ctx, Id a, Id b) {
return ctx.OpIMul(ctx.U32[1], a, b);
}
void EmitINeg32(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
Id EmitINeg32(EmitContext& ctx, Id value) {
return ctx.OpSNegate(ctx.U32[1], value);
}
void EmitIAbs32(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
Id EmitIAbs32(EmitContext& ctx, Id value) {
return ctx.OpSAbs(ctx.U32[1], value);
}
Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift) {

8
src/shader_recompiler/frontend/maxwell/translate/impl/integer_shift_left.cpp
View File

@ -56,12 +56,12 @@ void SHL(TranslatorVisitor& v, u64 insn, const IR::U32& unsafe_shift) {
}
} // Anonymous namespace
void TranslatorVisitor::SHL_reg(u64) {
throw NotImplementedException("SHL_reg");
void TranslatorVisitor::SHL_reg(u64 insn) {
SHL(*this, insn, GetReg20(insn));
}
void TranslatorVisitor::SHL_cbuf(u64) {
throw NotImplementedException("SHL_cbuf");
void TranslatorVisitor::SHL_cbuf(u64 insn) {
SHL(*this, insn, GetCbuf(insn));
}
void TranslatorVisitor::SHL_imm(u64 insn) {

2
src/shader_recompiler/frontend/maxwell/translate/impl/move_register.cpp
View File

@ -26,7 +26,7 @@ void MOV(TranslatorVisitor& v, u64 insn, const IR::U32& src, bool is_mov32i = fa
} // Anonymous namespace
void TranslatorVisitor::MOV_reg(u64 insn) {
MOV(*this, insn, GetReg8(insn));
MOV(*this, insn, GetReg20(insn));
}
void TranslatorVisitor::MOV_cbuf(u64 insn) {