Merge pull request #4663 from ReinUsesLisp/wswitch
video_core: Enforce -Werror=switch
This commit is contained in:
commit
1eae35621e
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@ -269,5 +269,5 @@ endif()
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if (MSVC)
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if (MSVC)
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target_compile_options(video_core PRIVATE /we4267)
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target_compile_options(video_core PRIVATE /we4267)
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else()
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else()
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target_compile_options(video_core PRIVATE -Werror=conversion -Wno-error=sign-conversion)
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target_compile_options(video_core PRIVATE -Werror=conversion -Wno-error=sign-conversion -Werror=switch)
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endif()
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endif()
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@ -1443,8 +1443,10 @@ private:
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return expr + ", vec2(0.0), vec2(0.0))";
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return expr + ", vec2(0.0), vec2(0.0))";
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case TextureType::TextureCube:
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case TextureType::TextureCube:
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return expr + ", vec3(0.0), vec3(0.0))";
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return expr + ", vec3(0.0), vec3(0.0))";
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}
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default:
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UNREACHABLE();
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UNREACHABLE();
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break;
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}
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}
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}
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for (const auto& variant : extras) {
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for (const auto& variant : extras) {
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@ -47,6 +47,8 @@ inline GLenum VertexFormat(Maxwell::VertexAttribute attrib) {
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return GL_UNSIGNED_INT;
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return GL_UNSIGNED_INT;
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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return GL_UNSIGNED_INT_2_10_10_10_REV;
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return GL_UNSIGNED_INT_2_10_10_10_REV;
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default:
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break;
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}
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}
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break;
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break;
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case Maxwell::VertexAttribute::Type::SignedNorm:
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case Maxwell::VertexAttribute::Type::SignedNorm:
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@ -70,6 +72,8 @@ inline GLenum VertexFormat(Maxwell::VertexAttribute attrib) {
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return GL_INT;
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return GL_INT;
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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return GL_INT_2_10_10_10_REV;
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return GL_INT_2_10_10_10_REV;
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default:
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break;
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}
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}
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break;
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break;
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case Maxwell::VertexAttribute::Type::Float:
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case Maxwell::VertexAttribute::Type::Float:
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@ -84,6 +88,8 @@ inline GLenum VertexFormat(Maxwell::VertexAttribute attrib) {
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case Maxwell::VertexAttribute::Size::Size_32_32_32:
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case Maxwell::VertexAttribute::Size::Size_32_32_32:
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case Maxwell::VertexAttribute::Size::Size_32_32_32_32:
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case Maxwell::VertexAttribute::Size::Size_32_32_32_32:
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return GL_FLOAT;
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return GL_FLOAT;
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default:
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break;
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}
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}
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break;
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break;
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}
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}
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@ -78,10 +78,11 @@ VkSamplerAddressMode WrapMode(const VKDevice& device, Tegra::Texture::WrapMode w
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case Tegra::Texture::WrapMode::MirrorOnceBorder:
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case Tegra::Texture::WrapMode::MirrorOnceBorder:
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UNIMPLEMENTED();
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UNIMPLEMENTED();
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return VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE;
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return VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE;
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}
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default:
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UNIMPLEMENTED_MSG("Unimplemented wrap mode={}", static_cast<u32>(wrap_mode));
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UNIMPLEMENTED_MSG("Unimplemented wrap mode={}", static_cast<u32>(wrap_mode));
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return {};
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return {};
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}
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}
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}
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VkCompareOp DepthCompareFunction(Tegra::Texture::DepthCompareFunc depth_compare_func) {
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VkCompareOp DepthCompareFunction(Tegra::Texture::DepthCompareFunc depth_compare_func) {
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switch (depth_compare_func) {
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switch (depth_compare_func) {
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@ -298,10 +299,11 @@ VkPrimitiveTopology PrimitiveTopology([[maybe_unused]] const VKDevice& device,
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return VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST;
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return VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST;
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case Maxwell::PrimitiveTopology::Patches:
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case Maxwell::PrimitiveTopology::Patches:
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return VK_PRIMITIVE_TOPOLOGY_PATCH_LIST;
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return VK_PRIMITIVE_TOPOLOGY_PATCH_LIST;
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}
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default:
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UNIMPLEMENTED_MSG("Unimplemented topology={}", static_cast<u32>(topology));
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UNIMPLEMENTED_MSG("Unimplemented topology={}", static_cast<u32>(topology));
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return {};
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return {};
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}
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}
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}
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VkFormat VertexFormat(Maxwell::VertexAttribute::Type type, Maxwell::VertexAttribute::Size size) {
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VkFormat VertexFormat(Maxwell::VertexAttribute::Type type, Maxwell::VertexAttribute::Size size) {
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switch (type) {
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switch (type) {
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@ -325,6 +327,8 @@ VkFormat VertexFormat(Maxwell::VertexAttribute::Type type, Maxwell::VertexAttrib
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return VK_FORMAT_R16G16B16A16_UNORM;
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return VK_FORMAT_R16G16B16A16_UNORM;
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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return VK_FORMAT_A2B10G10R10_UNORM_PACK32;
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return VK_FORMAT_A2B10G10R10_UNORM_PACK32;
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default:
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break;
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}
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}
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break;
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break;
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case Maxwell::VertexAttribute::Type::SignedNorm:
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case Maxwell::VertexAttribute::Type::SignedNorm:
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@ -347,6 +351,8 @@ VkFormat VertexFormat(Maxwell::VertexAttribute::Type type, Maxwell::VertexAttrib
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return VK_FORMAT_R16G16B16A16_SNORM;
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return VK_FORMAT_R16G16B16A16_SNORM;
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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return VK_FORMAT_A2B10G10R10_SNORM_PACK32;
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return VK_FORMAT_A2B10G10R10_SNORM_PACK32;
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default:
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break;
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}
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}
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break;
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break;
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case Maxwell::VertexAttribute::Type::UnsignedScaled:
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case Maxwell::VertexAttribute::Type::UnsignedScaled:
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@ -369,6 +375,8 @@ VkFormat VertexFormat(Maxwell::VertexAttribute::Type type, Maxwell::VertexAttrib
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return VK_FORMAT_R16G16B16A16_USCALED;
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return VK_FORMAT_R16G16B16A16_USCALED;
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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return VK_FORMAT_A2B10G10R10_USCALED_PACK32;
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return VK_FORMAT_A2B10G10R10_USCALED_PACK32;
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default:
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break;
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}
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}
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break;
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break;
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case Maxwell::VertexAttribute::Type::SignedScaled:
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case Maxwell::VertexAttribute::Type::SignedScaled:
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@ -391,6 +399,8 @@ VkFormat VertexFormat(Maxwell::VertexAttribute::Type type, Maxwell::VertexAttrib
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return VK_FORMAT_R16G16B16A16_SSCALED;
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return VK_FORMAT_R16G16B16A16_SSCALED;
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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return VK_FORMAT_A2B10G10R10_SSCALED_PACK32;
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return VK_FORMAT_A2B10G10R10_SSCALED_PACK32;
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default:
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break;
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}
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}
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break;
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break;
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case Maxwell::VertexAttribute::Type::UnsignedInt:
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case Maxwell::VertexAttribute::Type::UnsignedInt:
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@ -421,6 +431,8 @@ VkFormat VertexFormat(Maxwell::VertexAttribute::Type type, Maxwell::VertexAttrib
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return VK_FORMAT_R32G32B32A32_UINT;
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return VK_FORMAT_R32G32B32A32_UINT;
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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return VK_FORMAT_A2B10G10R10_UINT_PACK32;
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return VK_FORMAT_A2B10G10R10_UINT_PACK32;
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default:
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break;
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}
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}
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break;
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break;
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case Maxwell::VertexAttribute::Type::SignedInt:
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case Maxwell::VertexAttribute::Type::SignedInt:
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@ -451,6 +463,8 @@ VkFormat VertexFormat(Maxwell::VertexAttribute::Type type, Maxwell::VertexAttrib
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return VK_FORMAT_R32G32B32A32_SINT;
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return VK_FORMAT_R32G32B32A32_SINT;
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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case Maxwell::VertexAttribute::Size::Size_10_10_10_2:
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return VK_FORMAT_A2B10G10R10_SINT_PACK32;
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return VK_FORMAT_A2B10G10R10_SINT_PACK32;
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default:
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break;
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}
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}
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break;
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break;
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case Maxwell::VertexAttribute::Type::Float:
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case Maxwell::VertexAttribute::Type::Float:
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@ -471,6 +485,8 @@ VkFormat VertexFormat(Maxwell::VertexAttribute::Type type, Maxwell::VertexAttrib
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return VK_FORMAT_R32G32B32_SFLOAT;
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return VK_FORMAT_R32G32B32_SFLOAT;
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case Maxwell::VertexAttribute::Size::Size_32_32_32_32:
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case Maxwell::VertexAttribute::Size::Size_32_32_32_32:
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return VK_FORMAT_R32G32B32A32_SFLOAT;
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return VK_FORMAT_R32G32B32A32_SFLOAT;
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default:
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break;
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}
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}
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break;
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break;
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}
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}
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@ -262,6 +262,22 @@ const char* ToString(VkResult result) noexcept {
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return "VK_ERROR_INVALID_DEVICE_ADDRESS_EXT";
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return "VK_ERROR_INVALID_DEVICE_ADDRESS_EXT";
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case VkResult::VK_ERROR_FULL_SCREEN_EXCLUSIVE_MODE_LOST_EXT:
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case VkResult::VK_ERROR_FULL_SCREEN_EXCLUSIVE_MODE_LOST_EXT:
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return "VK_ERROR_FULL_SCREEN_EXCLUSIVE_MODE_LOST_EXT";
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return "VK_ERROR_FULL_SCREEN_EXCLUSIVE_MODE_LOST_EXT";
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case VkResult::VK_ERROR_UNKNOWN:
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return "VK_ERROR_UNKNOWN";
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case VkResult::VK_ERROR_INCOMPATIBLE_VERSION_KHR:
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return "VK_ERROR_INCOMPATIBLE_VERSION_KHR";
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case VkResult::VK_THREAD_IDLE_KHR:
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return "VK_THREAD_IDLE_KHR";
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case VkResult::VK_THREAD_DONE_KHR:
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return "VK_THREAD_DONE_KHR";
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case VkResult::VK_OPERATION_DEFERRED_KHR:
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return "VK_OPERATION_DEFERRED_KHR";
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case VkResult::VK_OPERATION_NOT_DEFERRED_KHR:
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return "VK_OPERATION_NOT_DEFERRED_KHR";
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case VkResult::VK_PIPELINE_COMPILE_REQUIRED_EXT:
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return "VK_PIPELINE_COMPILE_REQUIRED_EXT";
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case VkResult::VK_RESULT_MAX_ENUM:
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return "VK_RESULT_MAX_ENUM";
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}
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}
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return "Unknown";
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return "Unknown";
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}
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}
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@ -53,6 +53,9 @@ u32 ShaderIR::DecodeArithmeticHalf(NodeBlock& bb, u32 pc) {
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absolute_a = ((instr.value >> 44) & 1) != 0;
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absolute_a = ((instr.value >> 44) & 1) != 0;
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absolute_b = ((instr.value >> 54) & 1) != 0;
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absolute_b = ((instr.value >> 54) & 1) != 0;
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break;
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break;
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default:
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UNREACHABLE();
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break;
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}
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}
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half.type_a);
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half.type_a);
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@ -119,6 +119,8 @@ ComponentType GetComponentType(Tegra::Engines::SamplerDescriptor descriptor,
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return descriptor.r_type;
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return descriptor.r_type;
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}
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}
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break;
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break;
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default:
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break;
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}
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}
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UNIMPLEMENTED_MSG("Texture format not implemented={}", format);
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UNIMPLEMENTED_MSG("Texture format not implemented={}", format);
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return ComponentType::FLOAT;
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return ComponentType::FLOAT;
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@ -220,10 +222,11 @@ u32 GetComponentSize(TextureFormat format, std::size_t component) {
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return (component == 0 || component == 1) ? 8 : 0;
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return (component == 0 || component == 1) ? 8 : 0;
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case TextureFormat::G4R4:
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case TextureFormat::G4R4:
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return (component == 0 || component == 1) ? 4 : 0;
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return (component == 0 || component == 1) ? 4 : 0;
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}
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default:
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UNIMPLEMENTED_MSG("Texture format not implemented={}", format);
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UNIMPLEMENTED_MSG("Texture format not implemented={}", format);
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return 0;
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return 0;
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}
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}
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}
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std::size_t GetImageComponentMask(TextureFormat format) {
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std::size_t GetImageComponentMask(TextureFormat format) {
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constexpr u8 R = 0b0001;
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constexpr u8 R = 0b0001;
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@ -257,10 +260,11 @@ std::size_t GetImageComponentMask(TextureFormat format) {
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case TextureFormat::R8:
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case TextureFormat::R8:
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case TextureFormat::R1:
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case TextureFormat::R1:
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return std::size_t{R};
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return std::size_t{R};
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}
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default:
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UNIMPLEMENTED_MSG("Texture format not implemented={}", format);
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UNIMPLEMENTED_MSG("Texture format not implemented={}", format);
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return std::size_t{R | G | B | A};
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return std::size_t{R | G | B | A};
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}
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}
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}
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std::size_t GetImageTypeNumCoordinates(Tegra::Shader::ImageType image_type) {
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std::size_t GetImageTypeNumCoordinates(Tegra::Shader::ImageType image_type) {
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switch (image_type) {
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switch (image_type) {
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@ -463,6 +467,8 @@ u32 ShaderIR::DecodeImage(NodeBlock& bb, u32 pc) {
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return OperationCode::AtomicImageXor;
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return OperationCode::AtomicImageXor;
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case Tegra::Shader::ImageAtomicOperation::Exch:
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case Tegra::Shader::ImageAtomicOperation::Exch:
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return OperationCode::AtomicImageExchange;
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return OperationCode::AtomicImageExchange;
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default:
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break;
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}
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}
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default:
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default:
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break;
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break;
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