shader: Address feedback
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881b33da3b
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2999028976
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@ -184,16 +184,19 @@ void TranslatorVisitor::F2F_imm([[maybe_unused]] u64 insn) {
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BitField<49, 1, u64> abs;
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BitField<10, 2, FloatFormat> src_size;
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BitField<41, 1, u64> selector;
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BitField<20, 20, u64> imm;
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BitField<20, 19, u64> imm;
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BitField<56, 1, u64> imm_neg;
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} const f2f{insn};
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IR::F16F32F64 src_a;
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switch (f2f.src_size) {
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case FloatFormat::F16: {
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const u32 imm{static_cast<u32>(f2f.imm & 0x00ffff)};
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IR::Value vector{ir.UnpackFloat2x16(ir.Imm32(imm | (imm << 16)))};
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src_a = IR::F16{ir.CompositeExtract(vector, 0)};
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const u32 imm{static_cast<u32>(f2f.imm & 0x0000ffff)};
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const IR::Value vector{ir.UnpackFloat2x16(ir.Imm32(imm | (imm << 16)))};
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src_a = IR::F16{ir.CompositeExtract(vector, f2f.selector != 0 ? 0 : 1)};
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if (f2f.imm_neg != 0) {
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throw NotImplementedException("Neg bit on F16");
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}
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break;
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}
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case FloatFormat::F32:
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@ -206,6 +209,6 @@ void TranslatorVisitor::F2F_imm([[maybe_unused]] u64 insn) {
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throw NotImplementedException("Invalid dest format {}", f2f.src_size.Value());
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}
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F2F(*this, insn, src_a, f2f.abs != 0);
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} // namespace Shader::Maxwell
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}
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} // namespace Shader::Maxwell
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@ -83,7 +83,7 @@ void IADD3(TranslatorVisitor& v, u64 insn, IR::U32 op_b, IR::U32 op_c) {
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lhs = v.ir.IAdd(lhs, carry);
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}
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if (iadd3.cc != 0 && iadd3.shift == Shift::Left) {
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IR::U32 high_bits{v.ir.ShiftRightLogical(lhs, v.ir.Imm32(16))};
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const IR::U32 high_bits{v.ir.ShiftRightLogical(lhs, v.ir.Imm32(16))};
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of_1 = v.ir.LogicalOr(of_1, v.ir.INotEqual(v.ir.Imm32(0), high_bits));
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}
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lhs = IntegerShift(v.ir, lhs, iadd3.shift);
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