Shader_IR: Implement BRX tracking.
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5ee4fb6e12
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@ -124,6 +124,111 @@ enum class ParseResult : u32 {
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AbnormalFlow,
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AbnormalFlow,
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};
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};
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struct BranchIndirectInfo {
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u32 buffer{};
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u32 offset{};
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u32 entries{};
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s32 relative_position{};
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};
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std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState& state,
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u32 start_address, u32 current_position) {
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const u32 shader_start = state.start;
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u32 pos = current_position;
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BranchIndirectInfo result{};
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u64 track_register = 0;
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// Step 0 Get BRX Info
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const Instruction instr = {state.program_code[pos]};
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const auto opcode = OpCode::Decode(instr);
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if (opcode->get().GetId() != OpCode::Id::BRX) {
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return {};
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}
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if (instr.brx.constant_buffer != 0) {
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return {};
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}
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track_register = instr.gpr8.Value();
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result.relative_position = instr.brx.GetBranchExtend();
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pos--;
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bool found_track = false;
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// Step 1 Track LDC
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while (pos >= shader_start) {
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if (IsSchedInstruction(pos, shader_start)) {
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pos--;
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continue;
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}
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const Instruction instr = {state.program_code[pos]};
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const auto opcode = OpCode::Decode(instr);
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if (opcode->get().GetId() == OpCode::Id::LD_C) {
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if (instr.gpr0.Value() == track_register &&
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instr.ld_c.type.Value() == Tegra::Shader::UniformType::Single) {
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result.buffer = instr.cbuf36.index;
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result.offset = instr.cbuf36.GetOffset();
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track_register = instr.gpr8.Value();
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pos--;
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found_track = true;
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break;
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}
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}
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pos--;
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}
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if (!found_track) {
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return {};
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}
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found_track = false;
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// Step 2 Track SHL
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while (pos >= shader_start) {
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if (IsSchedInstruction(pos, shader_start)) {
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pos--;
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continue;
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}
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const Instruction instr = {state.program_code[pos]};
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const auto opcode = OpCode::Decode(instr);
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if (opcode->get().GetId() == OpCode::Id::SHL_IMM) {
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if (instr.gpr0.Value() == track_register) {
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track_register = instr.gpr8.Value();
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pos--;
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found_track = true;
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break;
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}
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}
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pos--;
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}
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if (!found_track) {
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return {};
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}
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found_track = false;
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// Step 3 Track IMNMX
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while (pos >= shader_start) {
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if (IsSchedInstruction(pos, shader_start)) {
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pos--;
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continue;
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}
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const Instruction instr = {state.program_code[pos]};
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const auto opcode = OpCode::Decode(instr);
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if (opcode->get().GetId() == OpCode::Id::IMNMX_IMM) {
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if (instr.gpr0.Value() == track_register) {
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track_register = instr.gpr8.Value();
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result.entries = instr.alu.GetSignedImm20_20();
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pos--;
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found_track = true;
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break;
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}
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}
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pos--;
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}
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if (!found_track) {
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return {};
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}
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return {result};
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}
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std::pair<ParseResult, ParseInfo> ParseCode(CFGRebuildState& state, u32 address) {
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std::pair<ParseResult, ParseInfo> ParseCode(CFGRebuildState& state, u32 address) {
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u32 offset = static_cast<u32>(address);
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u32 offset = static_cast<u32>(address);
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const u32 end_address = static_cast<u32>(state.program_size / sizeof(Instruction));
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const u32 end_address = static_cast<u32>(state.program_size / sizeof(Instruction));
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@ -298,6 +403,14 @@ std::pair<ParseResult, ParseInfo> ParseCode(CFGRebuildState& state, u32 address)
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break;
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break;
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}
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}
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case OpCode::Id::BRX: {
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case OpCode::Id::BRX: {
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auto tmp = TrackBranchIndirectInfo(state, address, offset);
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if (tmp) {
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auto result = *tmp;
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LOG_CRITICAL(HW_GPU, "Track Successful, BRX: buffer:{}, offset:{}, entries:{}",
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result.buffer, result.offset, result.entries);
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} else {
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LOG_CRITICAL(HW_GPU, "Track Unsuccesful");
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}
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return {ParseResult::AbnormalFlow, parse_info};
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return {ParseResult::AbnormalFlow, parse_info};
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}
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}
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default:
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default:
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