Merge pull request #3815 from FernandoS27/command-list-2
GPU: More optimizations to GPU Command List Processing and DMA Copy Optimizations
This commit is contained in:
commit
41682e0888
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@ -8,6 +8,7 @@ add_library(video_core STATIC
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dma_pusher.h
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engines/const_buffer_engine_interface.h
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engines/const_buffer_info.h
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engines/engine_interface.h
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engines/engine_upload.cpp
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engines/engine_upload.h
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engines/fermi_2d.cpp
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@ -27,6 +27,8 @@ void DmaPusher::DispatchCalls() {
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dma_pushbuffer_subindex = 0;
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dma_state.is_last_call = true;
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while (system.IsPoweredOn()) {
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if (!Step()) {
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break;
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@ -82,9 +84,11 @@ bool DmaPusher::Step() {
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index);
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CallMultiMethod(&command_header.argument, max_write);
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dma_state.method_count -= max_write;
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dma_state.is_last_call = true;
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index += max_write;
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continue;
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} else {
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dma_state.is_last_call = dma_state.method_count <= 1;
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CallMethod(command_header.argument);
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}
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@ -144,12 +148,22 @@ void DmaPusher::SetState(const CommandHeader& command_header) {
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}
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void DmaPusher::CallMethod(u32 argument) const {
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gpu.CallMethod({dma_state.method, argument, dma_state.subchannel, dma_state.method_count});
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if (dma_state.method < non_puller_methods) {
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gpu.CallMethod({dma_state.method, argument, dma_state.subchannel, dma_state.method_count});
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} else {
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subchannels[dma_state.subchannel]->CallMethod(dma_state.method, argument,
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dma_state.is_last_call);
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}
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}
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void DmaPusher::CallMultiMethod(const u32* base_start, u32 num_methods) const {
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gpu.CallMultiMethod(dma_state.method, dma_state.subchannel, base_start, num_methods,
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dma_state.method_count);
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if (dma_state.method < non_puller_methods) {
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gpu.CallMultiMethod(dma_state.method, dma_state.subchannel, base_start, num_methods,
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dma_state.method_count);
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} else {
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subchannels[dma_state.subchannel]->CallMultiMethod(dma_state.method, base_start,
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num_methods, dma_state.method_count);
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}
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}
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} // namespace Tegra
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@ -4,11 +4,13 @@
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#pragma once
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#include <array>
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#include <vector>
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#include <queue>
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "video_core/engines/engine_interface.h"
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namespace Core {
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class System;
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@ -69,7 +71,13 @@ public:
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void DispatchCalls();
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void BindSubchannel(Tegra::Engines::EngineInterface* engine, u32 subchannel_id) {
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subchannels[subchannel_id] = engine;
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}
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private:
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static constexpr u32 non_puller_methods = 0x40;
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static constexpr u32 max_subchannels = 8;
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bool Step();
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void SetState(const CommandHeader& command_header);
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@ -88,6 +96,7 @@ private:
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u32 method_count; ///< Current method count
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u32 length_pending; ///< Large NI command length pending
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bool non_incrementing; ///< Current command's NI flag
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bool is_last_call;
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};
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DmaState dma_state{};
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@ -96,6 +105,8 @@ private:
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GPUVAddr dma_mget{}; ///< main pushbuffer last read address
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bool ib_enable{true}; ///< IB mode enabled
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std::array<Tegra::Engines::EngineInterface*, max_subchannels> subchannels{};
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GPU& gpu;
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Core::System& system;
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};
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@ -0,0 +1,22 @@
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// Copyright 2020 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <type_traits>
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#include "common/common_types.h"
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namespace Tegra::Engines {
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class EngineInterface {
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public:
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/// Write the value to the register identified by method.
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virtual void CallMethod(u32 method, u32 method_argument, bool is_last_call) = 0;
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/// Write multiple values to the register identified by method.
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virtual void CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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u32 methods_pending) = 0;
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};
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} // namespace Tegra::Engines
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@ -12,13 +12,13 @@ namespace Tegra::Engines {
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Fermi2D::Fermi2D(VideoCore::RasterizerInterface& rasterizer) : rasterizer{rasterizer} {}
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void Fermi2D::CallMethod(const GPU::MethodCall& method_call) {
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ASSERT_MSG(method_call.method < Regs::NUM_REGS,
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void Fermi2D::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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ASSERT_MSG(method < Regs::NUM_REGS,
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"Invalid Fermi2D register, increase the size of the Regs structure");
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regs.reg_array[method_call.method] = method_call.argument;
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regs.reg_array[method] = method_argument;
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switch (method_call.method) {
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switch (method) {
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// Trigger the surface copy on the last register write. This is blit_src_y, but this is 64-bit,
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// so trigger on the second 32-bit write.
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case FERMI2D_REG_INDEX(blit_src_y) + 1: {
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@ -30,7 +30,7 @@ void Fermi2D::CallMethod(const GPU::MethodCall& method_call) {
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void Fermi2D::CallMultiMethod(u32 method, const u32* base_start, u32 amount, u32 methods_pending) {
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for (std::size_t i = 0; i < amount; i++) {
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CallMethod({method, base_start[i], 0, methods_pending - static_cast<u32>(i)});
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CallMethod(method, base_start[i], methods_pending - static_cast<u32>(i) <= 1);
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}
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}
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@ -10,6 +10,7 @@
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#include "common/common_funcs.h"
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#include "common/common_types.h"
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#include "common/math_util.h"
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#include "video_core/engines/engine_interface.h"
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#include "video_core/gpu.h"
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namespace Tegra {
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@ -31,16 +32,17 @@ namespace Tegra::Engines {
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#define FERMI2D_REG_INDEX(field_name) \
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(offsetof(Tegra::Engines::Fermi2D::Regs, field_name) / sizeof(u32))
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class Fermi2D final {
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class Fermi2D final : public EngineInterface {
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public:
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explicit Fermi2D(VideoCore::RasterizerInterface& rasterizer);
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~Fermi2D() = default;
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/// Write the value to the register identified by method.
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void CallMethod(const GPU::MethodCall& method_call);
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void CallMethod(u32 method, u32 method_argument, bool is_last_call) override;
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/// Write multiple values to the register identified by method.
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void CallMultiMethod(u32 method, const u32* base_start, u32 amount, u32 methods_pending);
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void CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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u32 methods_pending) override;
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enum class Origin : u32 {
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Center = 0,
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@ -24,20 +24,19 @@ KeplerCompute::KeplerCompute(Core::System& system, VideoCore::RasterizerInterfac
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KeplerCompute::~KeplerCompute() = default;
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void KeplerCompute::CallMethod(const GPU::MethodCall& method_call) {
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ASSERT_MSG(method_call.method < Regs::NUM_REGS,
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void KeplerCompute::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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ASSERT_MSG(method < Regs::NUM_REGS,
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"Invalid KeplerCompute register, increase the size of the Regs structure");
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regs.reg_array[method_call.method] = method_call.argument;
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regs.reg_array[method] = method_argument;
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switch (method_call.method) {
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switch (method) {
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case KEPLER_COMPUTE_REG_INDEX(exec_upload): {
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upload_state.ProcessExec(regs.exec_upload.linear != 0);
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break;
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}
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case KEPLER_COMPUTE_REG_INDEX(data_upload): {
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const bool is_last_call = method_call.IsLastCall();
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upload_state.ProcessData(method_call.argument, is_last_call);
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upload_state.ProcessData(method_argument, is_last_call);
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if (is_last_call) {
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system.GPU().Maxwell3D().OnMemoryWrite();
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}
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@ -54,7 +53,7 @@ void KeplerCompute::CallMethod(const GPU::MethodCall& method_call) {
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void KeplerCompute::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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u32 methods_pending) {
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for (std::size_t i = 0; i < amount; i++) {
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CallMethod({method, base_start[i], 0, methods_pending - static_cast<u32>(i)});
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CallMethod(method, base_start[i], methods_pending - static_cast<u32>(i) <= 1);
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}
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}
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@ -11,6 +11,7 @@
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#include "common/common_funcs.h"
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#include "common/common_types.h"
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#include "video_core/engines/const_buffer_engine_interface.h"
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#include "video_core/engines/engine_interface.h"
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#include "video_core/engines/engine_upload.h"
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#include "video_core/engines/shader_type.h"
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#include "video_core/gpu.h"
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@ -39,7 +40,7 @@ namespace Tegra::Engines {
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#define KEPLER_COMPUTE_REG_INDEX(field_name) \
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(offsetof(Tegra::Engines::KeplerCompute::Regs, field_name) / sizeof(u32))
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class KeplerCompute final : public ConstBufferEngineInterface {
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class KeplerCompute final : public ConstBufferEngineInterface, public EngineInterface {
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public:
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explicit KeplerCompute(Core::System& system, VideoCore::RasterizerInterface& rasterizer,
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MemoryManager& memory_manager);
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@ -200,10 +201,11 @@ public:
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"KeplerCompute LaunchParams has wrong size");
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/// Write the value to the register identified by method.
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void CallMethod(const GPU::MethodCall& method_call);
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void CallMethod(u32 method, u32 method_argument, bool is_last_call) override;
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/// Write multiple values to the register identified by method.
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void CallMultiMethod(u32 method, const u32* base_start, u32 amount, u32 methods_pending);
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void CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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u32 methods_pending) override;
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Texture::FullTextureInfo GetTexture(std::size_t offset) const;
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@ -19,20 +19,19 @@ KeplerMemory::KeplerMemory(Core::System& system, MemoryManager& memory_manager)
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KeplerMemory::~KeplerMemory() = default;
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void KeplerMemory::CallMethod(const GPU::MethodCall& method_call) {
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ASSERT_MSG(method_call.method < Regs::NUM_REGS,
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void KeplerMemory::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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ASSERT_MSG(method < Regs::NUM_REGS,
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"Invalid KeplerMemory register, increase the size of the Regs structure");
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regs.reg_array[method_call.method] = method_call.argument;
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regs.reg_array[method] = method_argument;
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switch (method_call.method) {
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switch (method) {
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case KEPLERMEMORY_REG_INDEX(exec): {
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upload_state.ProcessExec(regs.exec.linear != 0);
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break;
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}
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case KEPLERMEMORY_REG_INDEX(data): {
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const bool is_last_call = method_call.IsLastCall();
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upload_state.ProcessData(method_call.argument, is_last_call);
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upload_state.ProcessData(method_argument, is_last_call);
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if (is_last_call) {
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system.GPU().Maxwell3D().OnMemoryWrite();
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}
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@ -44,7 +43,7 @@ void KeplerMemory::CallMethod(const GPU::MethodCall& method_call) {
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void KeplerMemory::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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u32 methods_pending) {
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for (std::size_t i = 0; i < amount; i++) {
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CallMethod({method, base_start[i], 0, methods_pending - static_cast<u32>(i)});
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CallMethod(method, base_start[i], methods_pending - static_cast<u32>(i) <= 1);
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}
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}
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@ -10,6 +10,7 @@
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#include "common/bit_field.h"
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#include "common/common_funcs.h"
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#include "common/common_types.h"
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#include "video_core/engines/engine_interface.h"
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#include "video_core/engines/engine_upload.h"
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#include "video_core/gpu.h"
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@ -32,16 +33,17 @@ namespace Tegra::Engines {
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#define KEPLERMEMORY_REG_INDEX(field_name) \
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(offsetof(Tegra::Engines::KeplerMemory::Regs, field_name) / sizeof(u32))
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class KeplerMemory final {
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class KeplerMemory final : public EngineInterface {
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public:
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KeplerMemory(Core::System& system, MemoryManager& memory_manager);
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~KeplerMemory();
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/// Write the value to the register identified by method.
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void CallMethod(const GPU::MethodCall& method_call);
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void CallMethod(u32 method, u32 method_argument, bool is_last_call) override;
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/// Write multiple values to the register identified by method.
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void CallMultiMethod(u32 method, const u32* base_start, u32 amount, u32 methods_pending);
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void CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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u32 methods_pending) override;
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struct Regs {
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static constexpr size_t NUM_REGS = 0x7F;
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@ -125,12 +125,10 @@ void Maxwell3D::CallMacroMethod(u32 method, std::size_t num_parameters, const u3
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}
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}
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void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
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const u32 method = method_call.method;
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void Maxwell3D::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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if (method == cb_data_state.current) {
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regs.reg_array[method] = method_call.argument;
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ProcessCBData(method_call.argument);
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regs.reg_array[method] = method_argument;
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ProcessCBData(method_argument);
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return;
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} else if (cb_data_state.current != null_cb_data) {
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FinishCBData();
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@ -153,10 +151,10 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
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executing_macro = method;
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}
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macro_params.push_back(method_call.argument);
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macro_params.push_back(method_argument);
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// Call the macro when there are no more parameters in the command buffer
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if (method_call.IsLastCall()) {
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if (is_last_call) {
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CallMacroMethod(executing_macro, macro_params.size(), macro_params.data());
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macro_params.clear();
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}
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@ -166,7 +164,7 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
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ASSERT_MSG(method < Regs::NUM_REGS,
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"Invalid Maxwell3D register, increase the size of the Regs structure");
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u32 arg = method_call.argument;
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u32 arg = method_argument;
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// Keep track of the register value in shadow_state when requested.
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if (shadow_state.shadow_ram_control == Regs::ShadowRamControl::Track ||
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shadow_state.shadow_ram_control == Regs::ShadowRamControl::TrackWithFilter) {
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@ -189,7 +187,7 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
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break;
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}
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case MAXWELL3D_REG_INDEX(shadow_ram_control): {
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shadow_state.shadow_ram_control = static_cast<Regs::ShadowRamControl>(method_call.argument);
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shadow_state.shadow_ram_control = static_cast<Regs::ShadowRamControl>(method_argument);
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break;
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}
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case MAXWELL3D_REG_INDEX(macros.data): {
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@ -272,7 +270,6 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
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break;
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}
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case MAXWELL3D_REG_INDEX(data_upload): {
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const bool is_last_call = method_call.IsLastCall();
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upload_state.ProcessData(arg, is_last_call);
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if (is_last_call) {
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OnMemoryWrite();
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@ -330,7 +327,7 @@ void Maxwell3D::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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}
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default: {
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for (std::size_t i = 0; i < amount; i++) {
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CallMethod({method, base_start[i], 0, methods_pending - static_cast<u32>(i)});
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CallMethod(method, base_start[i], methods_pending - static_cast<u32>(i) <= 1);
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}
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}
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}
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@ -360,16 +357,15 @@ void Maxwell3D::StepInstance(const MMEDrawMode expected_mode, const u32 count) {
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StepInstance(expected_mode, count);
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}
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void Maxwell3D::CallMethodFromMME(const GPU::MethodCall& method_call) {
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const u32 method = method_call.method;
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void Maxwell3D::CallMethodFromMME(u32 method, u32 method_argument) {
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if (mme_inline[method]) {
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regs.reg_array[method] = method_call.argument;
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regs.reg_array[method] = method_argument;
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if (method == MAXWELL3D_REG_INDEX(vertex_buffer.count) ||
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method == MAXWELL3D_REG_INDEX(index_array.count)) {
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const MMEDrawMode expected_mode = method == MAXWELL3D_REG_INDEX(vertex_buffer.count)
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? MMEDrawMode::Array
|
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: MMEDrawMode::Indexed;
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StepInstance(expected_mode, method_call.argument);
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StepInstance(expected_mode, method_argument);
|
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} else if (method == MAXWELL3D_REG_INDEX(draw.vertex_begin_gl)) {
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mme_draw.instance_mode =
|
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(regs.draw.instance_next != 0) || (regs.draw.instance_cont != 0);
|
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|
@ -381,7 +377,7 @@ void Maxwell3D::CallMethodFromMME(const GPU::MethodCall& method_call) {
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if (mme_draw.current_mode != MMEDrawMode::Undefined) {
|
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FlushMMEInlineDraw();
|
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}
|
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CallMethod(method_call);
|
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CallMethod(method, method_argument, true);
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}
|
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}
|
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|
|
@ -19,6 +19,7 @@
|
|||
#include "common/math_util.h"
|
||||
#include "video_core/engines/const_buffer_engine_interface.h"
|
||||
#include "video_core/engines/const_buffer_info.h"
|
||||
#include "video_core/engines/engine_interface.h"
|
||||
#include "video_core/engines/engine_upload.h"
|
||||
#include "video_core/engines/shader_type.h"
|
||||
#include "video_core/gpu.h"
|
||||
|
@ -48,7 +49,7 @@ namespace Tegra::Engines {
|
|||
#define MAXWELL3D_REG_INDEX(field_name) \
|
||||
(offsetof(Tegra::Engines::Maxwell3D::Regs, field_name) / sizeof(u32))
|
||||
|
||||
class Maxwell3D final : public ConstBufferEngineInterface {
|
||||
class Maxwell3D final : public ConstBufferEngineInterface, public EngineInterface {
|
||||
public:
|
||||
explicit Maxwell3D(Core::System& system, VideoCore::RasterizerInterface& rasterizer,
|
||||
MemoryManager& memory_manager);
|
||||
|
@ -1360,13 +1361,14 @@ public:
|
|||
u32 GetRegisterValue(u32 method) const;
|
||||
|
||||
/// Write the value to the register identified by method.
|
||||
void CallMethod(const GPU::MethodCall& method_call);
|
||||
void CallMethod(u32 method, u32 method_argument, bool is_last_call) override;
|
||||
|
||||
/// Write multiple values to the register identified by method.
|
||||
void CallMultiMethod(u32 method, const u32* base_start, u32 amount, u32 methods_pending);
|
||||
void CallMultiMethod(u32 method, const u32* base_start, u32 amount,
|
||||
u32 methods_pending) override;
|
||||
|
||||
/// Write the value to the register identified by method.
|
||||
void CallMethodFromMME(const GPU::MethodCall& method_call);
|
||||
void CallMethodFromMME(u32 method, u32 method_argument);
|
||||
|
||||
void FlushMMEInlineDraw();
|
||||
|
||||
|
|
|
@ -17,16 +17,16 @@ namespace Tegra::Engines {
|
|||
MaxwellDMA::MaxwellDMA(Core::System& system, MemoryManager& memory_manager)
|
||||
: system{system}, memory_manager{memory_manager} {}
|
||||
|
||||
void MaxwellDMA::CallMethod(const GPU::MethodCall& method_call) {
|
||||
ASSERT_MSG(method_call.method < Regs::NUM_REGS,
|
||||
void MaxwellDMA::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
|
||||
ASSERT_MSG(method < Regs::NUM_REGS,
|
||||
"Invalid MaxwellDMA register, increase the size of the Regs structure");
|
||||
|
||||
regs.reg_array[method_call.method] = method_call.argument;
|
||||
regs.reg_array[method] = method_argument;
|
||||
|
||||
#define MAXWELLDMA_REG_INDEX(field_name) \
|
||||
(offsetof(Tegra::Engines::MaxwellDMA::Regs, field_name) / sizeof(u32))
|
||||
|
||||
switch (method_call.method) {
|
||||
switch (method) {
|
||||
case MAXWELLDMA_REG_INDEX(exec): {
|
||||
HandleCopy();
|
||||
break;
|
||||
|
@ -39,7 +39,7 @@ void MaxwellDMA::CallMethod(const GPU::MethodCall& method_call) {
|
|||
void MaxwellDMA::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
|
||||
u32 methods_pending) {
|
||||
for (std::size_t i = 0; i < amount; i++) {
|
||||
CallMethod({method, base_start[i], 0, methods_pending - static_cast<u32>(i)});
|
||||
CallMethod(method, base_start[i], methods_pending - static_cast<u32>(i) <= 1);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -90,7 +90,47 @@ void MaxwellDMA::HandleCopy() {
|
|||
ASSERT(regs.exec.enable_2d == 1);
|
||||
|
||||
if (regs.exec.is_dst_linear && !regs.exec.is_src_linear) {
|
||||
|
||||
ASSERT(regs.src_params.BlockDepth() == 0);
|
||||
// Optimized path for micro copies.
|
||||
if (regs.dst_pitch * regs.y_count < Texture::GetGOBSize() && regs.dst_pitch <= 64) {
|
||||
const u32 bytes_per_pixel = regs.dst_pitch / regs.x_count;
|
||||
const std::size_t src_size = Texture::GetGOBSize();
|
||||
const std::size_t dst_size = regs.dst_pitch * regs.y_count;
|
||||
u32 pos_x = regs.src_params.pos_x;
|
||||
u32 pos_y = regs.src_params.pos_y;
|
||||
const u64 offset =
|
||||
Texture::GetGOBOffset(regs.src_params.size_x, regs.src_params.size_y, pos_x, pos_y,
|
||||
regs.src_params.BlockDepth(), bytes_per_pixel);
|
||||
const u32 x_in_gob = 64 / bytes_per_pixel;
|
||||
pos_x = pos_x % x_in_gob;
|
||||
pos_y = pos_y % 8;
|
||||
|
||||
if (read_buffer.size() < src_size) {
|
||||
read_buffer.resize(src_size);
|
||||
}
|
||||
|
||||
if (write_buffer.size() < dst_size) {
|
||||
write_buffer.resize(dst_size);
|
||||
}
|
||||
|
||||
if (Settings::IsGPULevelExtreme()) {
|
||||
memory_manager.ReadBlock(source + offset, read_buffer.data(), src_size);
|
||||
memory_manager.ReadBlock(dest, write_buffer.data(), dst_size);
|
||||
} else {
|
||||
memory_manager.ReadBlockUnsafe(source + offset, read_buffer.data(), src_size);
|
||||
memory_manager.ReadBlockUnsafe(dest, write_buffer.data(), dst_size);
|
||||
}
|
||||
|
||||
Texture::UnswizzleSubrect(regs.x_count, regs.y_count, regs.dst_pitch,
|
||||
regs.src_params.size_x, bytes_per_pixel, read_buffer.data(),
|
||||
write_buffer.data(), regs.src_params.BlockHeight(), pos_x,
|
||||
pos_y);
|
||||
|
||||
memory_manager.WriteBlock(dest, write_buffer.data(), dst_size);
|
||||
|
||||
return;
|
||||
}
|
||||
// If the input is tiled and the output is linear, deswizzle the input and copy it over.
|
||||
const u32 bytes_per_pixel = regs.dst_pitch / regs.x_count;
|
||||
const std::size_t src_size = Texture::CalculateSize(
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
#include "common/bit_field.h"
|
||||
#include "common/common_funcs.h"
|
||||
#include "common/common_types.h"
|
||||
#include "video_core/engines/engine_interface.h"
|
||||
#include "video_core/gpu.h"
|
||||
|
||||
namespace Core {
|
||||
|
@ -27,16 +28,17 @@ namespace Tegra::Engines {
|
|||
* https://github.com/envytools/envytools/blob/master/rnndb/fifo/gk104_copy.xml
|
||||
*/
|
||||
|
||||
class MaxwellDMA final {
|
||||
class MaxwellDMA final : public EngineInterface {
|
||||
public:
|
||||
explicit MaxwellDMA(Core::System& system, MemoryManager& memory_manager);
|
||||
~MaxwellDMA() = default;
|
||||
|
||||
/// Write the value to the register identified by method.
|
||||
void CallMethod(const GPU::MethodCall& method_call);
|
||||
void CallMethod(u32 method, u32 method_argument, bool is_last_call) override;
|
||||
|
||||
/// Write multiple values to the register identified by method.
|
||||
void CallMultiMethod(u32 method, const u32* base_start, u32 amount, u32 methods_pending);
|
||||
void CallMultiMethod(u32 method, const u32* base_start, u32 amount,
|
||||
u32 methods_pending) override;
|
||||
|
||||
struct Regs {
|
||||
static constexpr std::size_t NUM_REGS = 0x1D6;
|
||||
|
|
|
@ -299,19 +299,21 @@ void GPU::CallEngineMethod(const MethodCall& method_call) {
|
|||
|
||||
switch (engine) {
|
||||
case EngineID::FERMI_TWOD_A:
|
||||
fermi_2d->CallMethod(method_call);
|
||||
fermi_2d->CallMethod(method_call.method, method_call.argument, method_call.IsLastCall());
|
||||
break;
|
||||
case EngineID::MAXWELL_B:
|
||||
maxwell_3d->CallMethod(method_call);
|
||||
maxwell_3d->CallMethod(method_call.method, method_call.argument, method_call.IsLastCall());
|
||||
break;
|
||||
case EngineID::KEPLER_COMPUTE_B:
|
||||
kepler_compute->CallMethod(method_call);
|
||||
kepler_compute->CallMethod(method_call.method, method_call.argument,
|
||||
method_call.IsLastCall());
|
||||
break;
|
||||
case EngineID::MAXWELL_DMA_COPY_A:
|
||||
maxwell_dma->CallMethod(method_call);
|
||||
maxwell_dma->CallMethod(method_call.method, method_call.argument, method_call.IsLastCall());
|
||||
break;
|
||||
case EngineID::KEPLER_INLINE_TO_MEMORY_B:
|
||||
kepler_memory->CallMethod(method_call);
|
||||
kepler_memory->CallMethod(method_call.method, method_call.argument,
|
||||
method_call.IsLastCall());
|
||||
break;
|
||||
default:
|
||||
UNIMPLEMENTED_MSG("Unimplemented engine");
|
||||
|
@ -347,7 +349,27 @@ void GPU::ProcessBindMethod(const MethodCall& method_call) {
|
|||
// Bind the current subchannel to the desired engine id.
|
||||
LOG_DEBUG(HW_GPU, "Binding subchannel {} to engine {}", method_call.subchannel,
|
||||
method_call.argument);
|
||||
bound_engines[method_call.subchannel] = static_cast<EngineID>(method_call.argument);
|
||||
const auto engine_id = static_cast<EngineID>(method_call.argument);
|
||||
bound_engines[method_call.subchannel] = static_cast<EngineID>(engine_id);
|
||||
switch (engine_id) {
|
||||
case EngineID::FERMI_TWOD_A:
|
||||
dma_pusher->BindSubchannel(fermi_2d.get(), method_call.subchannel);
|
||||
break;
|
||||
case EngineID::MAXWELL_B:
|
||||
dma_pusher->BindSubchannel(maxwell_3d.get(), method_call.subchannel);
|
||||
break;
|
||||
case EngineID::KEPLER_COMPUTE_B:
|
||||
dma_pusher->BindSubchannel(kepler_compute.get(), method_call.subchannel);
|
||||
break;
|
||||
case EngineID::MAXWELL_DMA_COPY_A:
|
||||
dma_pusher->BindSubchannel(maxwell_dma.get(), method_call.subchannel);
|
||||
break;
|
||||
case EngineID::KEPLER_INLINE_TO_MEMORY_B:
|
||||
dma_pusher->BindSubchannel(kepler_memory.get(), method_call.subchannel);
|
||||
break;
|
||||
default:
|
||||
UNIMPLEMENTED_MSG("Unimplemented engine {:04X}", static_cast<u32>(engine_id));
|
||||
}
|
||||
}
|
||||
|
||||
void GPU::ProcessSemaphoreTriggerMethod() {
|
||||
|
|
|
@ -328,7 +328,7 @@ void MacroInterpreter::SetMethodAddress(u32 address) {
|
|||
}
|
||||
|
||||
void MacroInterpreter::Send(u32 value) {
|
||||
maxwell3d.CallMethodFromMME({method_address.address, value});
|
||||
maxwell3d.CallMethodFromMME(method_address.address, value);
|
||||
// Increment the method address by the method increment.
|
||||
method_address.address.Assign(method_address.address.Value() +
|
||||
method_address.increment.Value());
|
||||
|
|
|
@ -382,4 +382,18 @@ std::size_t CalculateSize(bool tiled, u32 bytes_per_pixel, u32 width, u32 height
|
|||
}
|
||||
}
|
||||
|
||||
u64 GetGOBOffset(u32 width, u32 height, u32 dst_x, u32 dst_y, u32 block_height,
|
||||
u32 bytes_per_pixel) {
|
||||
auto div_ceil = [](const u32 x, const u32 y) { return ((x + y - 1) / y); };
|
||||
const u32 gobs_in_block = 1 << block_height;
|
||||
const u32 y_blocks = gob_size_y << block_height;
|
||||
const u32 x_per_gob = gob_size_x / bytes_per_pixel;
|
||||
const u32 x_blocks = div_ceil(width, x_per_gob);
|
||||
const u32 block_size = gob_size * gobs_in_block;
|
||||
const u32 stride = block_size * x_blocks;
|
||||
const u32 base = (dst_y / y_blocks) * stride + (dst_x / x_per_gob) * block_size;
|
||||
const u32 relative_y = dst_y % y_blocks;
|
||||
return base + (relative_y / gob_size_y) * gob_size;
|
||||
}
|
||||
|
||||
} // namespace Tegra::Texture
|
||||
|
|
|
@ -59,4 +59,8 @@ void UnswizzleSubrect(u32 subrect_width, u32 subrect_height, u32 dest_pitch, u32
|
|||
void SwizzleKepler(u32 width, u32 height, u32 dst_x, u32 dst_y, u32 block_height,
|
||||
std::size_t copy_size, const u8* source_data, u8* swizzle_data);
|
||||
|
||||
/// Obtains the offset of the gob for positions 'dst_x' & 'dst_y'
|
||||
u64 GetGOBOffset(u32 width, u32 height, u32 dst_x, u32 dst_y, u32 block_height,
|
||||
u32 bytes_per_pixel);
|
||||
|
||||
} // namespace Tegra::Texture
|
||||
|
|
Reference in New Issue