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yuzu-mainline
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Properly Implemented TXQ Instruction

This commit is contained in:
FernandoS27 2018-11-21 17:27:17 -04:00
parent b6d2c64f4d
commit 4a6a9b6622
1 changed files with 12 additions and 2 deletions

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@ -2976,6 +2976,8 @@ private:
ASSERT_MSG(!instr.txq.UsesMiscMode(Tegra::Shader::TextureMiscMode::NODEP), ASSERT_MSG(!instr.txq.UsesMiscMode(Tegra::Shader::TextureMiscMode::NODEP),
"NODEP is not implemented"); "NODEP is not implemented");
++shader.scope;
shader.AddLine('{');
// TODO: the new commits on the texture refactor, change the way samplers work. // TODO: the new commits on the texture refactor, change the way samplers work.
// Sadly, not all texture instructions specify the type of texture their sampler // Sadly, not all texture instructions specify the type of texture their sampler
// uses. This must be fixed at a later instance. // uses. This must be fixed at a later instance.
@ -2983,8 +2985,14 @@ private:
GetSampler(instr.sampler, Tegra::Shader::TextureType::Texture2D, false, false); GetSampler(instr.sampler, Tegra::Shader::TextureType::Texture2D, false, false);
switch (instr.txq.query_type) { switch (instr.txq.query_type) {
case Tegra::Shader::TextureQueryType::Dimension: { case Tegra::Shader::TextureQueryType::Dimension: {
const std::string texture = "textureQueryLevels(" + sampler + ')'; const std::string texture = "textureSize(" + sampler + ", " +
regs.SetRegisterToInteger(instr.gpr0, true, 0, texture, 1, 1); regs.GetRegisterAsInteger(instr.gpr8) + ')';
const std::string mip_level = "textureQueryLevels(" + sampler + ')';
shader.AddLine("ivec2 sizes = " + texture + ';');
regs.SetRegisterToInteger(instr.gpr0, true, 0, "sizes.x", 1, 1);
regs.SetRegisterToInteger(instr.gpr0.Value() + 1, true, 0, "sizes.y", 1, 1);
regs.SetRegisterToInteger(instr.gpr0.Value() + 2, true, 0, "0", 1, 1);
regs.SetRegisterToInteger(instr.gpr0.Value() + 3, true, 0, mip_level, 1, 1);
break; break;
} }
default: { default: {
@ -2993,6 +3001,8 @@ private:
UNREACHABLE(); UNREACHABLE();
} }
} }
--shader.scope;
shader.AddLine('}');
break; break;
} }
case OpCode::Id::TMML: { case OpCode::Id::TMML: {