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4d36a6a255
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@ -102,38 +102,6 @@
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#define FPSCR_C (1 << 29)
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#define FPSCR_V (1 << 28)
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/* -------------- */
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/* From asm/include/vfp.h */
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/* FPSCR bits */
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#define FPSCR_DEFAULT_NAN (1<<25)
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#define FPSCR_FLUSHTOZERO (1<<24)
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#define FPSCR_ROUND_NEAREST (0<<22)
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#define FPSCR_ROUND_PLUSINF (1<<22)
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#define FPSCR_ROUND_MINUSINF (2<<22)
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#define FPSCR_ROUND_TOZERO (3<<22)
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#define FPSCR_RMODE_BIT (22)
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#define FPSCR_RMODE_MASK (3 << FPSCR_RMODE_BIT)
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#define FPSCR_STRIDE_BIT (20)
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#define FPSCR_STRIDE_MASK (3 << FPSCR_STRIDE_BIT)
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#define FPSCR_LENGTH_BIT (16)
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#define FPSCR_LENGTH_MASK (7 << FPSCR_LENGTH_BIT)
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#define FPSCR_IOE (1<<8)
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#define FPSCR_DZE (1<<9)
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#define FPSCR_OFE (1<<10)
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#define FPSCR_UFE (1<<11)
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#define FPSCR_IXE (1<<12)
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#define FPSCR_IDE (1<<15)
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#define FPSCR_IOC (1<<0)
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#define FPSCR_DZC (1<<1)
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#define FPSCR_OFC (1<<2)
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#define FPSCR_UFC (1<<3)
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#define FPSCR_IXC (1<<4)
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#define FPSCR_IDC (1<<7)
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/* ---------------- */
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static inline u32 vfp_shiftright32jamming(u32 val, unsigned int shift)
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{
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if (shift) {
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