shader: Implement texture buffers
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d267948a73
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4e81fc8296
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@ -1231,6 +1231,20 @@ union Instruction {
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}
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} texs;
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union {
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BitField<28, 1, u64> is_array;
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BitField<29, 2, TextureType> texture_type;
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BitField<35, 1, u64> aoffi;
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BitField<49, 1, u64> nodep_flag;
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BitField<50, 1, u64> ms; // Multisample?
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BitField<54, 1, u64> cl;
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BitField<55, 1, u64> process_mode;
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TextureProcessMode GetTextureProcessMode() const {
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return process_mode == 0 ? TextureProcessMode::LZ : TextureProcessMode::LL;
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}
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} tld;
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union {
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BitField<49, 1, u64> nodep_flag;
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BitField<53, 4, u64> texture_info;
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@ -1408,6 +1422,7 @@ public:
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TXQ, // Texture Query
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TXQ_B, // Texture Query Bindless
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TEXS, // Texture Fetch with scalar/non-vec4 source/destinations
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TLD, // Texture Load
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TLDS, // Texture Load with scalar/non-vec4 source/destinations
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TLD4, // Texture Load 4
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TLD4S, // Texture Load 4 with scalar / non - vec4 source / destinations
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@ -1682,6 +1697,7 @@ private:
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INST("1101111101001---", Id::TXQ, Type::Texture, "TXQ"),
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INST("1101111101010---", Id::TXQ_B, Type::Texture, "TXQ_B"),
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INST("1101-00---------", Id::TEXS, Type::Texture, "TEXS"),
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INST("11011100--11----", Id::TLD, Type::Texture, "TLD"),
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INST("1101101---------", Id::TLDS, Type::Texture, "TLDS"),
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INST("110010----111---", Id::TLD4, Type::Texture, "TLD4"),
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INST("1101111100------", Id::TLD4S, Type::Texture, "TLD4S"),
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@ -245,6 +245,18 @@ u32 ShaderIR::DecodeTexture(NodeBlock& bb, u32 pc) {
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}
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break;
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}
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case OpCode::Id::TLD: {
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UNIMPLEMENTED_IF_MSG(instr.tld.aoffi, "AOFFI is not implemented");
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UNIMPLEMENTED_IF_MSG(instr.tld.ms, "MS is not implemented");
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UNIMPLEMENTED_IF_MSG(instr.tld.cl, "CL is not implemented");
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if (instr.tld.nodep_flag) {
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LOG_WARNING(HW_GPU, "TLD.NODEP implementation is incomplete");
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}
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WriteTexInstructionFloat(bb, instr, GetTldCode(instr));
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break;
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}
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case OpCode::Id::TLDS: {
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const Tegra::Shader::TextureType texture_type{instr.tlds.GetTextureType()};
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const bool is_array{instr.tlds.IsArrayTexture()};
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@ -575,6 +587,38 @@ Node4 ShaderIR::GetTld4Code(Instruction instr, TextureType texture_type, bool de
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return values;
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}
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Node4 ShaderIR::GetTldCode(Tegra::Shader::Instruction instr) {
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const auto texture_type{instr.tld.texture_type};
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const bool is_array{instr.tld.is_array};
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const bool lod_enabled{instr.tld.GetTextureProcessMode() == TextureProcessMode::LL};
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const std::size_t coord_count{GetCoordCount(texture_type)};
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u64 gpr8_cursor{instr.gpr8.Value()};
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const Node array_register{is_array ? GetRegister(gpr8_cursor++) : nullptr};
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std::vector<Node> coords;
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for (std::size_t i = 0; i < coord_count; ++i) {
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coords.push_back(GetRegister(gpr8_cursor++));
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}
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u64 gpr20_cursor{instr.gpr20.Value()};
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// const Node bindless_register{is_bindless ? GetRegister(gpr20_cursor++) : nullptr};
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const Node lod{lod_enabled ? GetRegister(gpr20_cursor++) : Immediate(0u)};
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// const Node aoffi_register{is_aoffi ? GetRegister(gpr20_cursor++) : nullptr};
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// const Node multisample{is_multisample ? GetRegister(gpr20_cursor++) : nullptr};
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const auto& sampler = GetSampler(instr.sampler, texture_type, is_array, false);
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Node4 values;
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for (u32 element = 0; element < values.size(); ++element) {
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auto coords_copy = coords;
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MetaTexture meta{sampler, array_register, {}, {}, {}, lod, {}, element};
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values[element] = Operation(OperationCode::TexelFetch, meta, std::move(coords_copy));
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}
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return values;
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}
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Node4 ShaderIR::GetTldsCode(Instruction instr, TextureType texture_type, bool is_array) {
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const std::size_t type_coord_count = GetCoordCount(texture_type);
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const bool lod_enabled = instr.tlds.GetTextureProcessMode() == TextureProcessMode::LL;
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@ -277,6 +277,8 @@ private:
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Node4 GetTld4Code(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
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bool depth_compare, bool is_array, bool is_aoffi);
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Node4 GetTldCode(Tegra::Shader::Instruction instr);
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Node4 GetTldsCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
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bool is_array);
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