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yuzu-mainline
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add shader stage when init shader ir

This commit is contained in:
namkazy 2020-03-22 20:13:05 +07:00
parent 2cefdd92bd
commit 58bcb86af5
4 changed files with 12 additions and 9 deletions

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@ -234,7 +234,7 @@ Shader CachedShader::CreateStageFromMemory(const ShaderParameters& params,
const std::size_t size_in_bytes = code.size() * sizeof(u64); const std::size_t size_in_bytes = code.size() * sizeof(u64);
auto registry = std::make_shared<Registry>(shader_type, params.system.GPU().Maxwell3D()); auto registry = std::make_shared<Registry>(shader_type, params.system.GPU().Maxwell3D());
const ShaderIR ir(code, STAGE_MAIN_OFFSET, COMPILER_SETTINGS, *registry); const ShaderIR ir(code, shader_type, STAGE_MAIN_OFFSET, COMPILER_SETTINGS, *registry);
// TODO(Rodrigo): Handle VertexA shaders // TODO(Rodrigo): Handle VertexA shaders
// std::optional<ShaderIR> ir_b; // std::optional<ShaderIR> ir_b;
// if (!code_b.empty()) { // if (!code_b.empty()) {
@ -264,7 +264,7 @@ Shader CachedShader::CreateKernelFromMemory(const ShaderParameters& params, Prog
auto& engine = params.system.GPU().KeplerCompute(); auto& engine = params.system.GPU().KeplerCompute();
auto registry = std::make_shared<Registry>(ShaderType::Compute, engine); auto registry = std::make_shared<Registry>(ShaderType::Compute, engine);
const ShaderIR ir(code, KERNEL_MAIN_OFFSET, COMPILER_SETTINGS, *registry); const ShaderIR ir(code, ShaderType::Compute, KERNEL_MAIN_OFFSET, COMPILER_SETTINGS, *registry);
const u64 uid = params.unique_identifier; const u64 uid = params.unique_identifier;
auto program = BuildShader(params.device, ShaderType::Compute, uid, ir, *registry); auto program = BuildShader(params.device, ShaderType::Compute, uid, ir, *registry);
@ -341,7 +341,7 @@ void ShaderCacheOpenGL::LoadDiskCache(const std::atomic_bool& stop_loading,
const bool is_compute = entry.type == ShaderType::Compute; const bool is_compute = entry.type == ShaderType::Compute;
const u32 main_offset = is_compute ? KERNEL_MAIN_OFFSET : STAGE_MAIN_OFFSET; const u32 main_offset = is_compute ? KERNEL_MAIN_OFFSET : STAGE_MAIN_OFFSET;
auto registry = MakeRegistry(entry); auto registry = MakeRegistry(entry);
const ShaderIR ir(entry.code, main_offset, COMPILER_SETTINGS, *registry); const ShaderIR ir(entry.code, entry.type, main_offset, COMPILER_SETTINGS, *registry);
std::shared_ptr<OGLProgram> program; std::shared_ptr<OGLProgram> program;
if (precompiled_entry) { if (precompiled_entry) {

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@ -162,7 +162,8 @@ CachedShader::CachedShader(Core::System& system, Tegra::Engines::ShaderType stag
ProgramCode program_code, u32 main_offset) ProgramCode program_code, u32 main_offset)
: RasterizerCacheObject{host_ptr}, gpu_addr{gpu_addr}, cpu_addr{cpu_addr}, : RasterizerCacheObject{host_ptr}, gpu_addr{gpu_addr}, cpu_addr{cpu_addr},
program_code{std::move(program_code)}, registry{stage, GetEngine(system, stage)}, program_code{std::move(program_code)}, registry{stage, GetEngine(system, stage)},
shader_ir{this->program_code, main_offset, compiler_settings, registry}, shader_ir{this->program_code, stage, main_offset, compiler_settings,
registry},
entries{GenerateShaderEntries(shader_ir)} {} entries{GenerateShaderEntries(shader_ir)} {}
CachedShader::~CachedShader() = default; CachedShader::~CachedShader() = default;

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@ -24,9 +24,10 @@ using Tegra::Shader::PredCondition;
using Tegra::Shader::PredOperation; using Tegra::Shader::PredOperation;
using Tegra::Shader::Register; using Tegra::Shader::Register;
ShaderIR::ShaderIR(const ProgramCode& program_code, u32 main_offset, CompilerSettings settings, ShaderIR::ShaderIR(const ProgramCode& program_code, Tegra::Engines::ShaderType shader_stage,
Registry& registry) u32 main_offset, CompilerSettings settings, Registry& registry)
: program_code{program_code}, main_offset{main_offset}, settings{settings}, registry{registry} { : program_code{program_code}, shader_stage{shader_stage},
main_offset{main_offset}, settings{settings}, registry{registry} {
Decode(); Decode();
PostDecode(); PostDecode();
} }

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@ -68,8 +68,8 @@ struct GlobalMemoryUsage {
class ShaderIR final { class ShaderIR final {
public: public:
explicit ShaderIR(const ProgramCode& program_code, u32 main_offset, CompilerSettings settings, explicit ShaderIR(const ProgramCode& program_code, Tegra::Engines::ShaderType shader_stage,
Registry& registry); u32 main_offset, CompilerSettings settings, Registry& registry);
~ShaderIR(); ~ShaderIR();
const std::map<u32, NodeBlock>& GetBasicBlocks() const { const std::map<u32, NodeBlock>& GetBasicBlocks() const {
@ -419,6 +419,7 @@ private:
u32 NewCustomVariable(); u32 NewCustomVariable();
const ProgramCode& program_code; const ProgramCode& program_code;
const Tegra::Engines::ShaderType shader_stage;
const u32 main_offset; const u32 main_offset;
const CompilerSettings settings; const CompilerSettings settings;
Registry& registry; Registry& registry;