Move ThreadContext to core/core.h and deal with the fallout
This commit is contained in:
parent
d46f650036
commit
7b3452c730
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@ -13,6 +13,7 @@
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#include "core/core.h"
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#include "core/core.h"
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#include "common/break_points.h"
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#include "common/break_points.h"
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#include "common/symbols.h"
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#include "common/symbols.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/disassembler/arm_disasm.h"
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#include "core/arm/disassembler/arm_disasm.h"
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@ -7,7 +7,9 @@
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#include "common/common.h"
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#include "common/common.h"
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "core/hle/svc.h"
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namespace Core {
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struct ThreadContext;
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}
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/// Generic ARM11 CPU interface
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/// Generic ARM11 CPU interface
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class ARM_Interface : NonCopyable {
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class ARM_Interface : NonCopyable {
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@ -87,13 +89,13 @@ public:
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* Saves the current CPU context
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* Saves the current CPU context
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* @param ctx Thread context to save
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* @param ctx Thread context to save
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*/
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*/
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virtual void SaveContext(ThreadContext& ctx) = 0;
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virtual void SaveContext(Core::ThreadContext& ctx) = 0;
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/**
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/**
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* Loads a CPU context
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* Loads a CPU context
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* @param ctx Thread context to load
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* @param ctx Thread context to load
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*/
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*/
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virtual void LoadContext(const ThreadContext& ctx) = 0;
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virtual void LoadContext(const Core::ThreadContext& ctx) = 0;
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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virtual void PrepareReschedule() = 0;
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virtual void PrepareReschedule() = 0;
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@ -9,6 +9,7 @@
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#include "core/arm/dyncom/arm_dyncom.h"
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#include "core/arm/dyncom/arm_dyncom.h"
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#include "core/arm/dyncom/arm_dyncom_interpreter.h"
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#include "core/arm/dyncom/arm_dyncom_interpreter.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/core_timing.h"
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const static cpu_config_t s_arm11_cpu_info = {
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const static cpu_config_t s_arm11_cpu_info = {
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@ -94,7 +95,7 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) {
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AddTicks(ticks_executed);
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AddTicks(ticks_executed);
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}
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}
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void ARM_DynCom::SaveContext(ThreadContext& ctx) {
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void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
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memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers));
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memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers));
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memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers));
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memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers));
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@ -110,7 +111,7 @@ void ARM_DynCom::SaveContext(ThreadContext& ctx) {
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ctx.mode = state->NextInstr;
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ctx.mode = state->NextInstr;
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}
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}
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void ARM_DynCom::LoadContext(const ThreadContext& ctx) {
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void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
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memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers));
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memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers));
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@ -71,13 +71,13 @@ public:
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* Saves the current CPU context
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* Saves the current CPU context
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* @param ctx Thread context to save
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* @param ctx Thread context to save
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*/
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*/
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void SaveContext(ThreadContext& ctx) override;
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void SaveContext(Core::ThreadContext& ctx) override;
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/**
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/**
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* Loads a CPU context
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* Loads a CPU context
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* @param ctx Thread context to load
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* @param ctx Thread context to load
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*/
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*/
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void LoadContext(const ThreadContext& ctx) override;
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void LoadContext(const Core::ThreadContext& ctx) override;
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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void PrepareReschedule() override;
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void PrepareReschedule() override;
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@ -4,6 +4,8 @@
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#include "core/arm/interpreter/arm_interpreter.h"
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#include "core/arm/interpreter/arm_interpreter.h"
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#include "core/core.h"
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const static cpu_config_t arm11_cpu_info = {
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const static cpu_config_t arm11_cpu_info = {
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"armv6", "arm11", 0x0007b000, 0x0007f000, NONCACHE
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"armv6", "arm11", 0x0007b000, 0x0007f000, NONCACHE
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};
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};
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@ -75,7 +77,7 @@ void ARM_Interpreter::ExecuteInstructions(int num_instructions) {
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ARMul_Emulate32(state);
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ARMul_Emulate32(state);
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}
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}
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void ARM_Interpreter::SaveContext(ThreadContext& ctx) {
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void ARM_Interpreter::SaveContext(Core::ThreadContext& ctx) {
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memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers));
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memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers));
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memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers));
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memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers));
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@ -91,7 +93,7 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) {
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ctx.mode = state->NextInstr;
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ctx.mode = state->NextInstr;
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}
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}
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void ARM_Interpreter::LoadContext(const ThreadContext& ctx) {
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void ARM_Interpreter::LoadContext(const Core::ThreadContext& ctx) {
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memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers));
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memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers));
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memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers));
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@ -70,13 +70,13 @@ public:
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* Saves the current CPU context
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* Saves the current CPU context
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* @param ctx Thread context to save
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* @param ctx Thread context to save
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*/
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*/
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void SaveContext(ThreadContext& ctx) override;
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void SaveContext(Core::ThreadContext& ctx) override;
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/**
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/**
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* Loads a CPU context
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* Loads a CPU context
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* @param ctx Thread context to load
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* @param ctx Thread context to load
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*/
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*/
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void LoadContext(const ThreadContext& ctx) override;
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void LoadContext(const Core::ThreadContext& ctx) override;
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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void PrepareReschedule() override;
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void PrepareReschedule() override;
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@ -8,6 +8,7 @@
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#include "core/core_timing.h"
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#include "core/core_timing.h"
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#include "core/settings.h"
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#include "core/settings.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/disassembler/arm_disasm.h"
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#include "core/arm/disassembler/arm_disasm.h"
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#include "core/arm/interpreter/arm_interpreter.h"
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#include "core/arm/interpreter/arm_interpreter.h"
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#include "core/arm/dyncom/arm_dyncom.h"
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#include "core/arm/dyncom/arm_dyncom.h"
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@ -4,8 +4,9 @@
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#pragma once
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#pragma once
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#include "core/arm/arm_interface.h"
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#include "common/common_types.h"
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#include "core/arm/skyeye_common/armdefs.h"
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class ARM_Interface;
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////////////////////////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////////////////////////
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@ -16,6 +17,21 @@ enum CPUCore {
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CPU_OldInterpreter,
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CPU_OldInterpreter,
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};
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};
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struct ThreadContext {
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u32 cpu_registers[13];
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u32 sp;
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u32 lr;
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u32 pc;
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u32 cpsr;
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u32 fpu_registers[32];
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u32 fpscr;
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u32 fpexc;
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// These are not part of native ThreadContext, but needed by emu
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u32 reg_15;
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u32 mode;
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};
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extern ARM_Interface* g_app_core; ///< ARM11 application core
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extern ARM_Interface* g_app_core; ///< ARM11 application core
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extern ARM_Interface* g_sys_core; ///< ARM11 system (OS) core
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extern ARM_Interface* g_sys_core; ///< ARM11 system (OS) core
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@ -9,6 +9,8 @@
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#include "common/chunk_file.h"
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#include "common/chunk_file.h"
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#include "common/log.h"
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#include "common/log.h"
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#include "core/arm/arm_interface.h"
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#include "core/core.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/core_timing.h"
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#pragma once
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#pragma once
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "core/arm/arm_interface.h"
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#include "core/mem_map.h"
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#include "core/mem_map.h"
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#include "core/hle/hle.h"
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#include "core/hle/hle.h"
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#include <vector>
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#include <vector>
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#include "core/arm/arm_interface.h"
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#include "core/mem_map.h"
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#include "core/mem_map.h"
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#include "core/hle/hle.h"
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#include "core/hle/hle.h"
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#include "core/hle/kernel/thread.h"
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#include "core/hle/kernel/thread.h"
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#pragma once
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#pragma once
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#include <string>
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "core/core.h"
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#include "core/core.h"
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#include "common/common.h"
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#include "common/common.h"
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#include "core/arm/arm_interface.h"
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#include "core/core.h"
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#include "core/core.h"
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#include "core/hle/kernel/kernel.h"
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#include "core/hle/kernel/kernel.h"
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#include "core/hle/kernel/thread.h"
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#include "core/hle/kernel/thread.h"
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#include "common/common.h"
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#include "common/common.h"
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#include "common/thread_queue_list.h"
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#include "common/thread_queue_list.h"
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#include "core/arm/arm_interface.h"
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#include "core/core.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/core_timing.h"
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#include "core/hle/hle.h"
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#include "core/hle/hle.h"
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return MakeResult<bool>(wait);
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return MakeResult<bool>(wait);
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}
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}
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ThreadContext context;
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Core::ThreadContext context;
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u32 thread_id;
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u32 thread_id;
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}
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}
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/// Saves the current CPU context
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/// Saves the current CPU context
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void SaveContext(ThreadContext& ctx) {
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void SaveContext(Core::ThreadContext& ctx) {
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Core::g_app_core->SaveContext(ctx);
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Core::g_app_core->SaveContext(ctx);
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}
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}
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/// Loads a CPU context
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/// Loads a CPU context
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void LoadContext(ThreadContext& ctx) {
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void LoadContext(Core::ThreadContext& ctx) {
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Core::g_app_core->LoadContext(ctx);
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Core::g_app_core->LoadContext(ctx);
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}
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}
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/// Resets a thread
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/// Resets a thread
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void ResetThread(Thread* t, u32 arg, s32 lowest_priority) {
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void ResetThread(Thread* t, u32 arg, s32 lowest_priority) {
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memset(&t->context, 0, sizeof(ThreadContext));
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memset(&t->context, 0, sizeof(Core::ThreadContext));
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t->context.cpu_registers[0] = arg;
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t->context.cpu_registers[0] = arg;
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t->context.pc = t->context.reg_15 = t->entry_point;
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t->context.pc = t->context.reg_15 = t->entry_point;
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#include "common/log.h"
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#include "common/log.h"
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#include "core/arm/arm_interface.h"
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#include "core/hle/hle.h"
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#include "core/hle/hle.h"
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#include "core/hle/kernel/event.h"
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#include "core/hle/kernel/event.h"
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#include "core/hle/kernel/shared_memory.h"
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#include "core/hle/kernel/shared_memory.h"
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#include "common/string_util.h"
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#include "common/string_util.h"
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#include "common/symbols.h"
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#include "common/symbols.h"
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#include "core/arm/arm_interface.h"
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#include "core/mem_map.h"
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#include "core/mem_map.h"
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#include "core/hle/kernel/address_arbiter.h"
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#include "core/hle/kernel/address_arbiter.h"
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u32 flags;
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u32 flags;
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};
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};
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struct ThreadContext {
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u32 cpu_registers[13];
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u32 sp;
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u32 lr;
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u32 pc;
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u32 cpsr;
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u32 fpu_registers[32];
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u32 fpscr;
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u32 fpexc;
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// These are not part of native ThreadContext, but needed by emu
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u32 reg_15;
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u32 mode;
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};
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enum ResetType {
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enum ResetType {
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RESETTYPE_ONESHOT,
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RESETTYPE_ONESHOT,
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RESETTYPE_STICKY,
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RESETTYPE_STICKY,
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "core/arm/arm_interface.h"
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#include "core/settings.h"
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#include "core/settings.h"
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#include "core/core.h"
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#include "core/core.h"
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#include "core/mem_map.h"
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#include "core/mem_map.h"
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