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yuzu-mainline
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MacroInterpreter: Avoid left shifting negative values.

The branch target is signed, so multiply by 4 instead of left shifting by 2
This commit is contained in:
Subv 2018-07-30 20:09:49 -05:00
parent e119e17d18
commit 8191273a3d
2 changed files with 6 additions and 2 deletions

View File

@ -102,11 +102,11 @@ bool MacroInterpreter::Step(const std::vector<u32>& code, bool is_delay_slot) {
if (taken) {
// Ignore the delay slot if the branch has the annul bit.
if (opcode.branch_annul) {
pc = base_address + (opcode.immediate << 2);
pc = base_address + opcode.GetBranchTarget();
return true;
}
delayed_pc = base_address + (opcode.immediate << 2);
delayed_pc = base_address + opcode.GetBranchTarget();
// Execute one more instruction due to the delay slot.
return Step(code, true);
}

View File

@ -91,6 +91,10 @@ private:
u32 GetBitfieldMask() const {
return (1 << bf_size) - 1;
}
s32 GetBranchTarget() const {
return static_cast<s32>(immediate * sizeof(u32));
}
};
union MethodAddress {