NVDRV: Further refactors and eliminate old code.
This commit is contained in:
parent
2931101e6f
commit
920429fde7
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@ -138,8 +138,6 @@ add_library(core STATIC
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frontend/emu_window.h
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frontend/framebuffer_layout.cpp
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frontend/framebuffer_layout.h
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hardware_interrupt_manager.cpp
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hardware_interrupt_manager.h
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hid/emulated_console.cpp
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hid/emulated_console.h
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hid/emulated_controller.cpp
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@ -27,7 +27,6 @@
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#include "core/file_sys/savedata_factory.h"
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#include "core/file_sys/vfs_concat.h"
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#include "core/file_sys/vfs_real.h"
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#include "core/hardware_interrupt_manager.h"
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#include "core/hid/hid_core.h"
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#include "core/hle/kernel/k_memory_manager.h"
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#include "core/hle/kernel/k_process.h"
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@ -226,7 +225,6 @@ struct System::Impl {
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service_manager = std::make_shared<Service::SM::ServiceManager>(kernel);
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services = std::make_unique<Service::Services>(service_manager, system);
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interrupt_manager = std::make_unique<Hardware::InterruptManager>(system);
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// Initialize time manager, which must happen after kernel is created
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time_manager.Initialize();
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@ -454,7 +452,6 @@ struct System::Impl {
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std::unique_ptr<Loader::AppLoader> app_loader;
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std::unique_ptr<Tegra::GPU> gpu_core;
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std::unique_ptr<Tegra::Host1x::Host1x> host1x_core;
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std::unique_ptr<Hardware::InterruptManager> interrupt_manager;
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std::unique_ptr<Core::DeviceMemory> device_memory;
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std::unique_ptr<AudioCore::AudioCore> audio_core;
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Core::Memory::Memory memory;
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@ -680,14 +677,6 @@ const Tegra::Host1x::Host1x& System::Host1x() const {
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return *impl->host1x_core;
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}
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Core::Hardware::InterruptManager& System::InterruptManager() {
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return *impl->interrupt_manager;
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}
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const Core::Hardware::InterruptManager& System::InterruptManager() const {
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return *impl->interrupt_manager;
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}
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VideoCore::RendererBase& System::Renderer() {
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return impl->gpu_core->Renderer();
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}
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@ -91,10 +91,6 @@ namespace Core::Timing {
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class CoreTiming;
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}
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namespace Core::Hardware {
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class InterruptManager;
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}
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namespace Core::HID {
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class HIDCore;
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}
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@ -305,12 +301,6 @@ public:
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/// Provides a constant reference to the core timing instance.
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[[nodiscard]] const Timing::CoreTiming& CoreTiming() const;
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/// Provides a reference to the interrupt manager instance.
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[[nodiscard]] Core::Hardware::InterruptManager& InterruptManager();
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/// Provides a constant reference to the interrupt manager instance.
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[[nodiscard]] const Core::Hardware::InterruptManager& InterruptManager() const;
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/// Provides a reference to the kernel instance.
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[[nodiscard]] Kernel::KernelCore& Kernel();
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@ -1,32 +0,0 @@
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// SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/hardware_interrupt_manager.h"
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#include "core/hle/service/nvdrv/nvdrv_interface.h"
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#include "core/hle/service/sm/sm.h"
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namespace Core::Hardware {
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InterruptManager::InterruptManager(Core::System& system_in) : system(system_in) {
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gpu_interrupt_event = Core::Timing::CreateEvent(
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"GPUInterrupt",
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[this](std::uintptr_t message, u64 time,
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std::chrono::nanoseconds) -> std::optional<std::chrono::nanoseconds> {
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auto nvdrv = system.ServiceManager().GetService<Service::Nvidia::NVDRV>("nvdrv");
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const u32 syncpt = static_cast<u32>(message >> 32);
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const u32 value = static_cast<u32>(message);
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nvdrv->SignalGPUInterruptSyncpt(syncpt, value);
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return std::nullopt;
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});
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}
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InterruptManager::~InterruptManager() = default;
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void InterruptManager::GPUInterruptSyncpt(const u32 syncpoint_id, const u32 value) {
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const u64 msg = (static_cast<u64>(syncpoint_id) << 32ULL) | value;
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system.CoreTiming().ScheduleEvent(std::chrono::nanoseconds{10}, gpu_interrupt_event, msg);
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}
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} // namespace Core::Hardware
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@ -1,32 +0,0 @@
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// SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include <memory>
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#include "common/common_types.h"
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namespace Core {
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class System;
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}
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namespace Core::Timing {
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struct EventType;
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}
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namespace Core::Hardware {
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class InterruptManager {
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public:
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explicit InterruptManager(Core::System& system);
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~InterruptManager();
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void GPUInterruptSyncpt(u32 syncpoint_id, u32 value);
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private:
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Core::System& system;
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std::shared_ptr<Core::Timing::EventType> gpu_interrupt_event;
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};
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} // namespace Core::Hardware
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@ -77,12 +77,9 @@ NvResult nvhost_ctrl::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>&
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return NvResult::NotImplemented;
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}
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void nvhost_ctrl::OnOpen(DeviceFD fd) {
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events_interface.RegisterForSignal(this);
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}
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void nvhost_ctrl::OnClose(DeviceFD fd) {
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events_interface.UnregisterForSignal(this);
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}
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void nvhost_ctrl::OnOpen(DeviceFD fd) {}
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void nvhost_ctrl::OnClose(DeviceFD fd) {}
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NvResult nvhost_ctrl::NvOsGetConfigU32(const std::vector<u8>& input, std::vector<u8>& output) {
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IocGetConfigParams params{};
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@ -395,21 +392,4 @@ u32 nvhost_ctrl::FindFreeNvEvent(u32 syncpoint_id) {
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return 0;
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}
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void nvhost_ctrl::SignalNvEvent(u32 syncpoint_id, u32 value) {
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u64 signal_mask = events_mask;
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while (signal_mask != 0) {
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const u64 event_id = std::countr_zero(signal_mask);
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signal_mask &= ~(1ULL << event_id);
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auto& event = events[event_id];
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if (event.assigned_syncpt != syncpoint_id || event.assigned_value != value) {
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continue;
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}
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if (event.status.exchange(EventState::Signalling, std::memory_order_acq_rel) ==
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EventState::Waiting) {
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event.kevent->GetWritableEvent().Signal();
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}
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event.status.store(EventState::Signalled, std::memory_order_release);
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}
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}
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} // namespace Service::Nvidia::Devices
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@ -56,8 +56,6 @@ public:
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};
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static_assert(sizeof(SyncpointEventValue) == sizeof(u32));
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void SignalNvEvent(u32 syncpoint_id, u32 value);
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private:
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struct InternalEvent {
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// Mask representing registered events
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@ -14,6 +14,7 @@
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#include "video_core/control/channel_state.h"
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#include "video_core/engines/puller.h"
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#include "video_core/gpu.h"
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#include "video_core/host1x/host1x.h"
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namespace Service::Nvidia::Devices {
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namespace {
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@ -31,7 +32,8 @@ nvhost_gpu::nvhost_gpu(Core::System& system_, EventInterface& events_interface_,
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syncpoint_manager{core_.GetSyncpointManager()}, nvmap{core.GetNvMapFile()},
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channel_state{system.GPU().AllocateChannel()} {
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channel_fence.id = syncpoint_manager.AllocateSyncpoint();
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channel_fence.value = system_.GPU().GetSyncpointValue(channel_fence.id);
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channel_fence.value =
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system_.Host1x().GetSyncpointManager().GetGuestSyncpointValue(channel_fence.id);
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sm_exception_breakpoint_int_report_event =
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events_interface.CreateEvent("GpuChannelSMExceptionBreakpointInt");
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sm_exception_breakpoint_pause_report_event =
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@ -189,7 +191,8 @@ NvResult nvhost_gpu::AllocGPFIFOEx2(const std::vector<u8>& input, std::vector<u8
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}
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system.GPU().InitChannel(*channel_state);
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channel_fence.value = system.GPU().GetSyncpointValue(channel_fence.id);
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channel_fence.value =
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system.Host1x().GetSyncpointManager().GetGuestSyncpointValue(channel_fence.id);
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params.fence_out = channel_fence;
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@ -33,23 +33,6 @@ EventInterface::EventInterface(Module& module_) : module{module_}, guard{}, on_s
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EventInterface::~EventInterface() = default;
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void EventInterface::RegisterForSignal(Devices::nvhost_ctrl* device) {
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std::unique_lock<std::mutex> lk(guard);
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on_signal.push_back(device);
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}
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void EventInterface::UnregisterForSignal(Devices::nvhost_ctrl* device) {
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std::unique_lock<std::mutex> lk(guard);
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on_signal.remove(device);
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}
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void EventInterface::Signal(u32 syncpoint_id, u32 value) {
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std::unique_lock<std::mutex> lk(guard);
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for (auto* device : on_signal) {
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device->SignalNvEvent(syncpoint_id, value);
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}
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}
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Kernel::KEvent* EventInterface::CreateEvent(std::string name) {
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Kernel::KEvent* new_event = module.service_context.CreateEvent(std::move(name));
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return new_event;
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@ -221,10 +204,6 @@ NvResult Module::Close(DeviceFD fd) {
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return NvResult::Success;
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}
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void Module::SignalSyncpt(const u32 syncpoint_id, const u32 value) {
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events_interface.Signal(syncpoint_id, value);
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}
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NvResult Module::QueryEvent(DeviceFD fd, u32 event_id, Kernel::KEvent*& event) {
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if (fd < 0) {
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LOG_ERROR(Service_NVDRV, "Invalid DeviceFD={}!", fd);
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EventInterface(Module& module_);
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~EventInterface();
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void RegisterForSignal(Devices::nvhost_ctrl*);
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void UnregisterForSignal(Devices::nvhost_ctrl*);
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void Signal(u32 syncpoint_id, u32 value);
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Kernel::KEvent* CreateEvent(std::string name);
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void FreeEvent(Kernel::KEvent* event);
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/// Closes a device file descriptor and returns operation success.
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NvResult Close(DeviceFD fd);
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void SignalSyncpt(const u32 syncpoint_id, const u32 value);
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NvResult QueryEvent(DeviceFD fd, u32 event_id, Kernel::KEvent*& event);
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private:
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@ -15,10 +15,6 @@
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namespace Service::Nvidia {
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void NVDRV::SignalGPUInterruptSyncpt(const u32 syncpoint_id, const u32 value) {
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nvdrv->SignalSyncpt(syncpoint_id, value);
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}
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void NVDRV::Open(Kernel::HLERequestContext& ctx) {
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LOG_DEBUG(Service_NVDRV, "called");
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IPC::ResponseBuilder rb{ctx, 4};
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@ -18,8 +18,6 @@ public:
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explicit NVDRV(Core::System& system_, std::shared_ptr<Module> nvdrv_, const char* name);
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~NVDRV() override;
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void SignalGPUInterruptSyncpt(u32 syncpoint_id, u32 value);
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private:
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void Open(Kernel::HLERequestContext& ctx);
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void Ioctl1(Kernel::HLERequestContext& ctx);
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@ -1,29 +0,0 @@
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// SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "common/assert.h"
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#include "video_core/command_classes/host1x.h"
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#include "video_core/gpu.h"
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Tegra::Host1x::Host1x(GPU& gpu_) : gpu(gpu_) {}
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Tegra::Host1x::~Host1x() = default;
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void Tegra::Host1x::ProcessMethod(Method method, u32 argument) {
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switch (method) {
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case Method::LoadSyncptPayload32:
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syncpoint_value = argument;
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break;
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case Method::WaitSyncpt:
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case Method::WaitSyncpt32:
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Execute(argument);
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break;
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default:
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UNIMPLEMENTED_MSG("Host1x method 0x{:X}", static_cast<u32>(method));
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break;
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}
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}
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void Tegra::Host1x::Execute(u32 data) {
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gpu.WaitFence(data, syncpoint_value);
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}
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@ -14,7 +14,6 @@
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/frontend/emu_window.h"
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#include "core/hardware_interrupt_manager.h"
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#include "core/hle/service/nvdrv/nvdata.h"
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#include "core/perf_stats.h"
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#include "video_core/cdma_pusher.h"
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namespace Tegra {
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MICROPROFILE_DEFINE(GPU_wait, "GPU", "Wait for the GPU", MP_RGB(128, 128, 192));
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struct GPU::Impl {
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explicit Impl(GPU& gpu_, Core::System& system_, bool is_async_, bool use_nvdec_)
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: gpu{gpu_}, system{system_}, host1x{system.Host1x()}, use_nvdec{use_nvdec_},
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return *shader_notify;
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}
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/// Allows the CPU/NvFlinger to wait on the GPU before presenting a frame.
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void WaitFence(u32 syncpoint_id, u32 value) {
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if (syncpoint_id == UINT32_MAX) {
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return;
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}
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MICROPROFILE_SCOPE(GPU_wait);
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host1x.GetSyncpointManager().WaitHost(syncpoint_id, value);
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}
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void IncrementSyncPoint(u32 syncpoint_id) {
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host1x.GetSyncpointManager().IncrementHost(syncpoint_id);
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}
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[[nodiscard]] u32 GetSyncpointValue(u32 syncpoint_id) const {
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return host1x.GetSyncpointManager().GetHostSyncpointValue(syncpoint_id);
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}
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void RegisterSyncptInterrupt(u32 syncpoint_id, u32 value) {
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auto& syncpoint_manager = host1x.GetSyncpointManager();
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syncpoint_manager.RegisterHostAction(syncpoint_id, value, [this, syncpoint_id, value]() {
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TriggerCpuInterrupt(syncpoint_id, value);
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});
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}
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[[nodiscard]] u64 GetTicks() const {
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// This values were reversed engineered by fincs from NVN
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// The gpu clock is reported in units of 385/625 nanoseconds
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@ -322,11 +295,6 @@ struct GPU::Impl {
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gpu_thread.FlushAndInvalidateRegion(addr, size);
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}
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void TriggerCpuInterrupt(u32 syncpoint_id, u32 value) const {
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auto& interrupt_manager = system.InterruptManager();
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interrupt_manager.GPUInterruptSyncpt(syncpoint_id, value);
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}
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void RequestSwapBuffers(const Tegra::FramebufferConfig* framebuffer,
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Service::Nvidia::NvFence* fences, size_t num_fences) {
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size_t current_request_counter{};
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impl->RequestSwapBuffers(framebuffer, fences, num_fences);
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}
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void GPU::WaitFence(u32 syncpoint_id, u32 value) {
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impl->WaitFence(syncpoint_id, value);
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}
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void GPU::IncrementSyncPoint(u32 syncpoint_id) {
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impl->IncrementSyncPoint(syncpoint_id);
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}
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u32 GPU::GetSyncpointValue(u32 syncpoint_id) const {
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return impl->GetSyncpointValue(syncpoint_id);
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}
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void GPU::RegisterSyncptInterrupt(u32 syncpoint_id, u32 value) {
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impl->RegisterSyncptInterrupt(syncpoint_id, value);
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}
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u64 GPU::GetTicks() const {
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return impl->GetTicks();
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}
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@ -171,15 +171,6 @@ public:
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/// Returns a const reference to the shader notifier.
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[[nodiscard]] const VideoCore::ShaderNotify& ShaderNotify() const;
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/// Allows the CPU/NvFlinger to wait on the GPU before presenting a frame.
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void WaitFence(u32 syncpoint_id, u32 value);
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void IncrementSyncPoint(u32 syncpoint_id);
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[[nodiscard]] u32 GetSyncpointValue(u32 syncpoint_id) const;
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void RegisterSyncptInterrupt(u32 syncpoint_id, u32 value);
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[[nodiscard]] u64 GetTicks() const;
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[[nodiscard]] bool IsAsync() const;
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@ -2,12 +2,15 @@
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// Licensed under GPLv3 or any later version
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// Refer to the license.txt file included.
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#include "common/microprofile.h"
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#include "video_core/host1x/syncpoint_manager.h"
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namespace Tegra {
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namespace Host1x {
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MICROPROFILE_DEFINE(GPU_wait, "GPU", "Wait for the GPU", MP_RGB(128, 128, 192));
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SyncpointManager::ActionHandle SyncpointManager::RegisterAction(
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std::atomic<u32>& syncpoint, std::list<RegisteredAction>& action_storage, u32 expected_value,
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std::function<void(void)>& action) {
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@ -58,6 +61,7 @@ void SyncpointManager::WaitGuest(u32 syncpoint_id, u32 expected_value) {
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}
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void SyncpointManager::WaitHost(u32 syncpoint_id, u32 expected_value) {
|
||||
MICROPROFILE_SCOPE(GPU_wait);
|
||||
Wait(syncpoints_host[syncpoint_id], wait_host_cv, expected_value);
|
||||
}
|
||||
|
||||
|
|
|
@ -396,10 +396,6 @@ void RasterizerOpenGL::SignalSemaphore(GPUVAddr addr, u32 value) {
|
|||
}
|
||||
|
||||
void RasterizerOpenGL::SignalSyncPoint(u32 value) {
|
||||
if (!gpu.IsAsync()) {
|
||||
gpu.IncrementSyncPoint(value);
|
||||
return;
|
||||
}
|
||||
fence_manager.SignalSyncPoint(value);
|
||||
}
|
||||
|
||||
|
|
|
@ -458,10 +458,6 @@ void RasterizerVulkan::SignalSemaphore(GPUVAddr addr, u32 value) {
|
|||
}
|
||||
|
||||
void RasterizerVulkan::SignalSyncPoint(u32 value) {
|
||||
if (!gpu.IsAsync()) {
|
||||
gpu.IncrementSyncPoint(value);
|
||||
return;
|
||||
}
|
||||
fence_manager.SignalSyncPoint(value);
|
||||
}
|
||||
|
||||
|
|
Reference in New Issue