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shader_decode: implement BREV on BFE

Implement reverse parallel follow: https://graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
This commit is contained in:
Nguyen Dac Nam 2020-03-13 14:13:31 +07:00 committed by GitHub
parent 93547cac68
commit 96a4abe12d
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 25 additions and 6 deletions

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@ -33,17 +33,36 @@ u32 ShaderIR::DecodeBfe(NodeBlock& bb, u32 pc) {
}(); }();
UNIMPLEMENTED_IF_MSG(instr.bfe.rd_cc, "Condition codes in BFE is not implemented"); UNIMPLEMENTED_IF_MSG(instr.bfe.rd_cc, "Condition codes in BFE is not implemented");
UNIMPLEMENTED_IF_MSG(instr.bfe.brev, "BREV in BFE is not implemented");
const bool is_signed = instr.bfe.is_signed; const bool is_signed = instr.bfe.is_signed;
const auto start_position = SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_b, if (instr.bfe.brev) {
Immediate(0), Immediate(8)); const auto swap = [&](u32 s, u32 mask) {
Node v1 =
SignedOperation(OperationCode::ILogicalShiftRight, is_signed, op_a, Immediate(s));
if (mask != 0) {
v1 = SignedOperation(OperationCode::IBitwiseAnd, is_signed, v1, Immediate(mask));
}
Node v2 = op_a;
if (mask != 0) {
v2 = SignedOperation(OperationCode::IBitwiseAnd, is_signed, op_a, Immediate(mask));
}
v2 = SignedOperation(OperationCode::ILogicalShiftLeft, is_signed, v2, Immediate(s));
return SignedOperation(OperationCode::IBitwiseOr, is_signed, v1, v2);
};
op_a = swap(1, 0x55555555U);
op_a = swap(2, 0x33333333U);
op_a = swap(4, 0x0F0F0F0FU);
op_a = swap(8, 0x00FF00FFU);
op_a = swap(16, 0);
}
const auto offset = SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_b,
Immediate(0), Immediate(8));
const auto bits = SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_b, const auto bits = SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_b,
Immediate(8), Immediate(8)); Immediate(8), Immediate(8));
const auto result =
auto result = SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_a, offset, bits);
SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_a, start_position, bits);
SetRegister(bb, instr.gpr0, result); SetRegister(bb, instr.gpr0, result);
return pc; return pc;