shader: Implement S2R Tid{XYZ} and CtaId{XYZ}
This commit is contained in:
parent
ada79fa8ad
commit
9c3461604c
|
@ -1513,6 +1513,16 @@ private:
|
||||||
return "uintBitsToFloat(config_pack[2])";
|
return "uintBitsToFloat(config_pack[2])";
|
||||||
}
|
}
|
||||||
|
|
||||||
|
template <u32 element>
|
||||||
|
std::string LocalInvocationId(Operation) {
|
||||||
|
return "utof(gl_LocalInvocationID"s + GetSwizzle(element) + ')';
|
||||||
|
}
|
||||||
|
|
||||||
|
template <u32 element>
|
||||||
|
std::string WorkGroupId(Operation) {
|
||||||
|
return "utof(gl_WorkGroupID"s + GetSwizzle(element) + ')';
|
||||||
|
}
|
||||||
|
|
||||||
static constexpr OperationDecompilersArray operation_decompilers = {
|
static constexpr OperationDecompilersArray operation_decompilers = {
|
||||||
&GLSLDecompiler::Assign,
|
&GLSLDecompiler::Assign,
|
||||||
|
|
||||||
|
@ -1652,6 +1662,12 @@ private:
|
||||||
&GLSLDecompiler::EndPrimitive,
|
&GLSLDecompiler::EndPrimitive,
|
||||||
|
|
||||||
&GLSLDecompiler::YNegate,
|
&GLSLDecompiler::YNegate,
|
||||||
|
&GLSLDecompiler::LocalInvocationId<0>,
|
||||||
|
&GLSLDecompiler::LocalInvocationId<1>,
|
||||||
|
&GLSLDecompiler::LocalInvocationId<2>,
|
||||||
|
&GLSLDecompiler::WorkGroupId<0>,
|
||||||
|
&GLSLDecompiler::WorkGroupId<1>,
|
||||||
|
&GLSLDecompiler::WorkGroupId<2>,
|
||||||
};
|
};
|
||||||
|
|
||||||
std::string GetRegister(u32 index) const {
|
std::string GetRegister(u32 index) const {
|
||||||
|
|
|
@ -1035,6 +1035,18 @@ private:
|
||||||
return {};
|
return {};
|
||||||
}
|
}
|
||||||
|
|
||||||
|
template <u32 element>
|
||||||
|
Id LocalInvocationId(Operation) {
|
||||||
|
UNIMPLEMENTED();
|
||||||
|
return {};
|
||||||
|
}
|
||||||
|
|
||||||
|
template <u32 element>
|
||||||
|
Id WorkGroupId(Operation) {
|
||||||
|
UNIMPLEMENTED();
|
||||||
|
return {};
|
||||||
|
}
|
||||||
|
|
||||||
Id DeclareBuiltIn(spv::BuiltIn builtin, spv::StorageClass storage, Id type,
|
Id DeclareBuiltIn(spv::BuiltIn builtin, spv::StorageClass storage, Id type,
|
||||||
const std::string& name) {
|
const std::string& name) {
|
||||||
const Id id = OpVariable(type, storage);
|
const Id id = OpVariable(type, storage);
|
||||||
|
@ -1291,6 +1303,12 @@ private:
|
||||||
&SPIRVDecompiler::EndPrimitive,
|
&SPIRVDecompiler::EndPrimitive,
|
||||||
|
|
||||||
&SPIRVDecompiler::YNegate,
|
&SPIRVDecompiler::YNegate,
|
||||||
|
&SPIRVDecompiler::LocalInvocationId<0>,
|
||||||
|
&SPIRVDecompiler::LocalInvocationId<1>,
|
||||||
|
&SPIRVDecompiler::LocalInvocationId<2>,
|
||||||
|
&SPIRVDecompiler::WorkGroupId<0>,
|
||||||
|
&SPIRVDecompiler::WorkGroupId<1>,
|
||||||
|
&SPIRVDecompiler::WorkGroupId<2>,
|
||||||
};
|
};
|
||||||
|
|
||||||
const ShaderIR& ir;
|
const ShaderIR& ir;
|
||||||
|
|
|
@ -13,6 +13,7 @@ using Tegra::Shader::ConditionCode;
|
||||||
using Tegra::Shader::Instruction;
|
using Tegra::Shader::Instruction;
|
||||||
using Tegra::Shader::OpCode;
|
using Tegra::Shader::OpCode;
|
||||||
using Tegra::Shader::Register;
|
using Tegra::Shader::Register;
|
||||||
|
using Tegra::Shader::SystemVariable;
|
||||||
|
|
||||||
u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
|
u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
|
||||||
const Instruction instr = {program_code[pc]};
|
const Instruction instr = {program_code[pc]};
|
||||||
|
@ -58,20 +59,33 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case OpCode::Id::MOV_SYS: {
|
case OpCode::Id::MOV_SYS: {
|
||||||
switch (instr.sys20) {
|
const Node value = [&]() {
|
||||||
case Tegra::Shader::SystemVariable::InvocationInfo: {
|
switch (instr.sys20) {
|
||||||
LOG_WARNING(HW_GPU, "MOV_SYS instruction with InvocationInfo is incomplete");
|
case SystemVariable::Ydirection:
|
||||||
SetRegister(bb, instr.gpr0, Immediate(0u));
|
return Operation(OperationCode::YNegate);
|
||||||
break;
|
case SystemVariable::InvocationInfo:
|
||||||
}
|
LOG_WARNING(HW_GPU, "MOV_SYS instruction with InvocationInfo is incomplete");
|
||||||
case Tegra::Shader::SystemVariable::Ydirection: {
|
return Immediate(0u);
|
||||||
// Config pack's third value is Y_NEGATE's state.
|
case SystemVariable::TidX:
|
||||||
SetRegister(bb, instr.gpr0, Operation(OperationCode::YNegate));
|
return Operation(OperationCode::LocalInvocationIdX);
|
||||||
break;
|
case SystemVariable::TidY:
|
||||||
}
|
return Operation(OperationCode::LocalInvocationIdY);
|
||||||
default:
|
case SystemVariable::TidZ:
|
||||||
UNIMPLEMENTED_MSG("Unhandled system move: {}", static_cast<u32>(instr.sys20.Value()));
|
return Operation(OperationCode::LocalInvocationIdZ);
|
||||||
}
|
case SystemVariable::CtaIdX:
|
||||||
|
return Operation(OperationCode::WorkGroupIdX);
|
||||||
|
case SystemVariable::CtaIdY:
|
||||||
|
return Operation(OperationCode::WorkGroupIdY);
|
||||||
|
case SystemVariable::CtaIdZ:
|
||||||
|
return Operation(OperationCode::WorkGroupIdZ);
|
||||||
|
default:
|
||||||
|
UNIMPLEMENTED_MSG("Unhandled system move: {}",
|
||||||
|
static_cast<u32>(instr.sys20.Value()));
|
||||||
|
return Immediate(0u);
|
||||||
|
}
|
||||||
|
}();
|
||||||
|
SetRegister(bb, instr.gpr0, value);
|
||||||
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case OpCode::Id::BRA: {
|
case OpCode::Id::BRA: {
|
||||||
|
|
|
@ -181,7 +181,13 @@ enum class OperationCode {
|
||||||
EmitVertex, /// () -> void
|
EmitVertex, /// () -> void
|
||||||
EndPrimitive, /// () -> void
|
EndPrimitive, /// () -> void
|
||||||
|
|
||||||
YNegate, /// () -> float
|
YNegate, /// () -> float
|
||||||
|
LocalInvocationIdX, /// () -> uint
|
||||||
|
LocalInvocationIdY, /// () -> uint
|
||||||
|
LocalInvocationIdZ, /// () -> uint
|
||||||
|
WorkGroupIdX, /// () -> uint
|
||||||
|
WorkGroupIdY, /// () -> uint
|
||||||
|
WorkGroupIdZ, /// () -> uint
|
||||||
|
|
||||||
Amount,
|
Amount,
|
||||||
};
|
};
|
||||||
|
|
Reference in New Issue