Merge pull request #12403 from liamwhite/clipdistance
shader_recompiler: use minimal clip distance array
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commit
9e5b4052ed
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@ -74,6 +74,11 @@ std::optional<OutAttr> OutputAttrPointer(EmitContext& ctx, IR::Attribute attr) {
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case IR::Attribute::ClipDistance7: {
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const u32 base{static_cast<u32>(IR::Attribute::ClipDistance0)};
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const u32 index{static_cast<u32>(attr) - base};
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if (index >= ctx.profile.max_user_clip_distances) {
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LOG_WARNING(Shader, "Ignoring clip distance store {} >= {} supported", index,
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ctx.profile.max_user_clip_distances);
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return std::nullopt;
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}
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const Id clip_num{ctx.Const(index)};
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return OutputAccessChain(ctx, ctx.output_f32, ctx.clip_distances, clip_num);
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}
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@ -1528,7 +1528,8 @@ void EmitContext::DefineOutputs(const IR::Program& program) {
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if (stage == Stage::Fragment) {
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throw NotImplementedException("Storing ClipDistance in fragment stage");
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}
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const Id type{TypeArray(F32[1], Const(8U))};
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const Id type{TypeArray(
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F32[1], Const(std::min(info.used_clip_distances, profile.max_user_clip_distances)))};
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clip_distances = DefineOutput(*this, type, invocations, spv::BuiltIn::ClipDistance);
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}
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if (info.stores[IR::Attribute::Layer] &&
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@ -913,7 +913,11 @@ void GatherInfoFromHeader(Environment& env, Info& info) {
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}
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for (size_t index = 0; index < 8; ++index) {
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const u16 mask{header.vtg.omap_systemc.clip_distances};
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info.stores.Set(IR::Attribute::ClipDistance0 + index, ((mask >> index) & 1) != 0);
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const bool used{((mask >> index) & 1) != 0};
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info.stores.Set(IR::Attribute::ClipDistance0 + index, used);
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if (used) {
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info.used_clip_distances = static_cast<u32>(index) + 1;
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}
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}
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info.stores.Set(IR::Attribute::PrimitiveId,
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header.vtg.omap_systemb.primitive_array_id != 0);
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@ -87,6 +87,8 @@ struct Profile {
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bool has_broken_robust{};
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u64 min_ssbo_alignment{};
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u32 max_user_clip_distances{};
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};
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} // namespace Shader
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@ -227,6 +227,8 @@ struct Info {
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bool requires_layer_emulation{};
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IR::Attribute emulated_layer{};
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u32 used_clip_distances{};
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boost::container::static_vector<ConstantBufferDescriptor, MAX_CBUFS>
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constant_buffer_descriptors;
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boost::container::static_vector<StorageBufferDescriptor, MAX_SSBOS> storage_buffers_descriptors;
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@ -233,6 +233,7 @@ ShaderCache::ShaderCache(RasterizerOpenGL& rasterizer_, Core::Frontend::EmuWindo
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.ignore_nan_fp_comparisons = true,
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.gl_max_compute_smem_size = device.GetMaxComputeSharedMemorySize(),
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.min_ssbo_alignment = device.GetShaderStorageBufferAlignment(),
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.max_user_clip_distances = 8,
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},
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host_info{
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.support_float64 = true,
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@ -374,6 +374,7 @@ PipelineCache::PipelineCache(RasterizerVulkan& rasterizer_, const Device& device
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.has_broken_robust =
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device.IsNvidia() && device.GetNvidiaArch() <= NvidiaArchitecture::Arch_Pascal,
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.min_ssbo_alignment = device.GetStorageBufferAlignment(),
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.max_user_clip_distances = device.GetMaxUserClipDistances(),
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};
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host_info = Shader::HostTranslateInfo{
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@ -665,6 +665,10 @@ public:
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return properties.properties.limits.maxViewports;
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}
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u32 GetMaxUserClipDistances() const {
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return properties.properties.limits.maxClipDistances;
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}
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bool SupportsConditionalBarriers() const {
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return supports_conditional_barriers;
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}
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