dyncom: Remove unnecessary enum and typedef
Also fixes descriptions in the process.
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11bd6024fb
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a6c9e453b2
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@ -3557,7 +3557,7 @@ enum {
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FETCH_FAILURE
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FETCH_FAILURE
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};
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};
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static tdstate decode_thumb_instr(ARMul_State* cpu, uint32_t inst, addr_t addr, uint32_t* arm_inst, uint32_t* inst_size, ARM_INST_PTR* ptr_inst_base){
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static tdstate decode_thumb_instr(ARMul_State* cpu, u32 inst, u32 addr, u32* arm_inst, u32* inst_size, ARM_INST_PTR* ptr_inst_base) {
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// Check if in Thumb mode
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// Check if in Thumb mode
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tdstate ret = thumb_translate (addr, inst, arm_inst, inst_size);
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tdstate ret = thumb_translate (addr, inst, arm_inst, inst_size);
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if(ret == t_branch){
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if(ret == t_branch){
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@ -3620,7 +3620,7 @@ typedef struct instruction_set_encoding_item ISEITEM;
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extern const ISEITEM arm_instruction[];
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extern const ISEITEM arm_instruction[];
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static int InterpreterTranslate(ARMul_State* cpu, int& bb_start, addr_t addr) {
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static int InterpreterTranslate(ARMul_State* cpu, int& bb_start, u32 addr) {
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Common::Profiling::ScopeTimer timer_decode(profile_decode);
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Common::Profiling::ScopeTimer timer_decode(profile_decode);
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// Decode instruction, get index
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// Decode instruction, get index
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@ -3638,8 +3638,8 @@ static int InterpreterTranslate(ARMul_State* cpu, int& bb_start, addr_t addr) {
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if (cpu->TFlag)
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if (cpu->TFlag)
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thumb = THUMB;
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thumb = THUMB;
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addr_t phys_addr = addr;
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u32 phys_addr = addr;
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addr_t pc_start = cpu->Reg[15];
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u32 pc_start = cpu->Reg[15];
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while(ret == NON_BRANCH) {
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while(ret == NON_BRANCH) {
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inst = Memory::Read32(phys_addr & 0xFFFFFFFC);
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inst = Memory::Read32(phys_addr & 0xFFFFFFFC);
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@ -22,31 +22,36 @@
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void switch_mode(ARMul_State* core, uint32_t mode);
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void switch_mode(ARMul_State* core, uint32_t mode);
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/* FIXME, we temporarily think thumb instruction is always 16 bit */
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// Note that for the 3DS, a Thumb instruction will only ever be
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// two bytes in size. Thus we don't need to worry about ThumbEE
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// or Thumb-2 where instructions can be 4 bytes in length.
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static inline u32 GET_INST_SIZE(ARMul_State* core) {
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static inline u32 GET_INST_SIZE(ARMul_State* core) {
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return core->TFlag? 2 : 4;
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return core->TFlag? 2 : 4;
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}
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}
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/**
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/**
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* @brief Read R15 and forced R15 to wold align, used address calculation
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* Checks if the PC is being read, and if so, word-aligns it.
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*
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* Used with address calculations.
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* @param core
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*
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* @param Rn
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* @param core The ARM CPU state instance.
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*
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* @param Rn The register being read.
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* @return
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*
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*/
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* @return If the PC is being read, then the word-aligned PC value is returned.
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static inline addr_t CHECK_READ_REG15_WA(ARMul_State* core, int Rn) {
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* If the PC is not being read, then the value stored in the register is returned.
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return (Rn == 15)? ((core->Reg[15] & ~0x3) + GET_INST_SIZE(core) * 2) : core->Reg[Rn];
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*/
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static inline u32 CHECK_READ_REG15_WA(ARMul_State* core, int Rn) {
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return (Rn == 15) ? ((core->Reg[15] & ~0x3) + GET_INST_SIZE(core) * 2) : core->Reg[Rn];
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}
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}
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/**
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/**
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* @brief Read R15, used to data processing with pc
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* Reads the PC. Used for data processing operations that use the PC.
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*
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*
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* @param core
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* @param core The ARM CPU state instance.
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* @param Rn
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* @param Rn The register being read.
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*
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*
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* @return
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* @return If the PC is being read, then the incremented PC value is returned.
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*/
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* If the PC is not being read, then the values stored in the register is returned.
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*/
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static inline u32 CHECK_READ_REG15(ARMul_State* core, int Rn) {
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static inline u32 CHECK_READ_REG15(ARMul_State* core, int Rn) {
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return (Rn == 15)? ((core->Reg[15] & ~0x1) + GET_INST_SIZE(core) * 2) : core->Reg[Rn];
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return (Rn == 15) ? ((core->Reg[15] & ~0x1) + GET_INST_SIZE(core) * 2) : core->Reg[Rn];
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}
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}
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@ -13,7 +13,7 @@
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// with the following Thumb instruction held in the high 16-bits. Passing in two Thumb instructions
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// with the following Thumb instruction held in the high 16-bits. Passing in two Thumb instructions
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// allows easier simulation of the special dual BL instruction.
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// allows easier simulation of the special dual BL instruction.
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tdstate thumb_translate(addr_t addr, uint32_t instr, uint32_t* ainstr, uint32_t* inst_size) {
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tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
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tdstate valid = t_uninitialized;
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tdstate valid = t_uninitialized;
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ARMword tinstr = instr;
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ARMword tinstr = instr;
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@ -35,9 +35,9 @@ enum tdstate {
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t_uninitialized,
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t_uninitialized,
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};
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};
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tdstate thumb_translate(addr_t addr, u32 instr, u32* ainstr, u32* inst_size);
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tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size);
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static inline u32 get_thumb_instr(u32 instr, addr_t pc) {
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static inline u32 get_thumb_instr(u32 instr, u32 pc) {
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u32 tinstr;
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u32 tinstr;
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if ((pc & 0x3) != 0)
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if ((pc & 0x3) != 0)
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tinstr = instr >> 16;
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tinstr = instr >> 16;
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@ -11,28 +11,3 @@ struct cpu_config_t
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u32 cpu_mask; // cpu_val's mask.
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u32 cpu_mask; // cpu_val's mask.
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u32 cachetype; // CPU cache type
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u32 cachetype; // CPU cache type
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};
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};
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enum {
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// No exception
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No_exp = 0,
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// Memory allocation exception
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Malloc_exp,
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// File open exception
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File_open_exp,
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// DLL open exception
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Dll_open_exp,
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// Invalid argument exception
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Invarg_exp,
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// Invalid module exception
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Invmod_exp,
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// wrong format exception for config file parsing
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Conf_format_exp,
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// some reference excess the predefiend range. Such as the index out of array range
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Excess_range_exp,
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// Can not find the desirable result
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Not_found_exp,
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// Unknown exception
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Unknown_exp
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};
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typedef u32 addr_t;
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