fixed_pipeline_state: Add requirements for VK_EXT_extended_dynamic_state
This moves dynamic state present in VK_EXT_extended_dynamic_state to a separate structure in FixedPipelineState. This is structure is at the bottom allowing us to hash and memcmp only when the extension is not supported.
This commit is contained in:
ReinUsesLisp
parent
7527402a46
commit
c387a72c76
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@ -39,28 +39,21 @@ constexpr std::array POLYGON_OFFSET_ENABLE_LUT = {
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} // Anonymous namespace
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void FixedPipelineState::DepthStencil::Fill(const Maxwell& regs) noexcept {
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raw = 0;
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front.action_stencil_fail.Assign(PackStencilOp(regs.stencil_front_op_fail));
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front.action_depth_fail.Assign(PackStencilOp(regs.stencil_front_op_zfail));
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front.action_depth_pass.Assign(PackStencilOp(regs.stencil_front_op_zpass));
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front.test_func.Assign(PackComparisonOp(regs.stencil_front_func_func));
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if (regs.stencil_two_side_enable) {
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back.action_stencil_fail.Assign(PackStencilOp(regs.stencil_back_op_fail));
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back.action_depth_fail.Assign(PackStencilOp(regs.stencil_back_op_zfail));
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back.action_depth_pass.Assign(PackStencilOp(regs.stencil_back_op_zpass));
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back.test_func.Assign(PackComparisonOp(regs.stencil_back_func_func));
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} else {
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back.action_stencil_fail.Assign(front.action_stencil_fail);
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back.action_depth_fail.Assign(front.action_depth_fail);
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back.action_depth_pass.Assign(front.action_depth_pass);
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back.test_func.Assign(front.test_func);
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void FixedPipelineState::VertexInput::Fill(const Maxwell& regs) noexcept {
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for (std::size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) {
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const auto& input = regs.vertex_attrib_format[index];
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auto& attribute = attributes[index];
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attribute.raw = 0;
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attribute.enabled.Assign(input.IsConstant() ? 0 : 1);
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attribute.buffer.Assign(input.buffer);
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attribute.offset.Assign(input.offset);
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attribute.type.Assign(static_cast<u32>(input.type.Value()));
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attribute.size.Assign(static_cast<u32>(input.size.Value()));
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}
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for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
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binding_divisors[index] =
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regs.instanced_arrays.IsInstancingEnabled(index) ? regs.vertex_array[index].divisor : 0;
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}
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depth_test_enable.Assign(regs.depth_test_enable);
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depth_write_enable.Assign(regs.depth_write_enabled);
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depth_bounds_enable.Assign(regs.depth_bounds_enable);
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stencil_enable.Assign(regs.stencil_enable);
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depth_test_func.Assign(PackComparisonOp(regs.depth_test_func));
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}
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void FixedPipelineState::Rasterizer::Fill(const Maxwell& regs) noexcept {
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@ -70,21 +63,11 @@ void FixedPipelineState::Rasterizer::Fill(const Maxwell& regs) noexcept {
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regs.polygon_offset_fill_enable};
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const u32 topology_index = static_cast<u32>(regs.draw.topology.Value());
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u32 packed_front_face = PackFrontFace(regs.front_face);
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if (regs.screen_y_control.triangle_rast_flip != 0) {
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// Flip front face
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packed_front_face = 1 - packed_front_face;
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}
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raw = 0;
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topology.Assign(topology_index);
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primitive_restart_enable.Assign(regs.primitive_restart.enabled != 0 ? 1 : 0);
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cull_enable.Assign(regs.cull_test_enabled != 0 ? 1 : 0);
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depth_bias_enable.Assign(enabled_lut[POLYGON_OFFSET_ENABLE_LUT[topology_index]] != 0 ? 1 : 0);
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depth_clamp_disabled.Assign(regs.view_volume_clip_control.depth_clamp_disabled.Value());
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ndc_minus_one_to_one.Assign(regs.depth_mode == Maxwell::DepthMode::MinusOneToOne ? 1 : 0);
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cull_face.Assign(PackCullFace(regs.cull_face));
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front_face.Assign(packed_front_face);
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polygon_mode.Assign(PackPolygonMode(regs.polygon_mode_front));
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patch_control_points_minus_one.Assign(regs.patch_vertices - 1);
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tessellation_primitive.Assign(static_cast<u32>(regs.tess_mode.prim.Value()));
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@ -147,11 +130,56 @@ void FixedPipelineState::BlendingAttachment::Fill(const Maxwell& regs, std::size
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enable.Assign(1);
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}
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void FixedPipelineState::DynamicState::Fill(const Maxwell& regs) {
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const u32 topology_index = static_cast<u32>(regs.draw.topology.Value());
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u32 packed_front_face = PackFrontFace(regs.front_face);
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if (regs.screen_y_control.triangle_rast_flip != 0) {
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// Flip front face
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packed_front_face = 1 - packed_front_face;
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}
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raw1 = 0;
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raw2 = 0;
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front.action_stencil_fail.Assign(PackStencilOp(regs.stencil_front_op_fail));
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front.action_depth_fail.Assign(PackStencilOp(regs.stencil_front_op_zfail));
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front.action_depth_pass.Assign(PackStencilOp(regs.stencil_front_op_zpass));
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front.test_func.Assign(PackComparisonOp(regs.stencil_front_func_func));
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if (regs.stencil_two_side_enable) {
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back.action_stencil_fail.Assign(PackStencilOp(regs.stencil_back_op_fail));
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back.action_depth_fail.Assign(PackStencilOp(regs.stencil_back_op_zfail));
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back.action_depth_pass.Assign(PackStencilOp(regs.stencil_back_op_zpass));
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back.test_func.Assign(PackComparisonOp(regs.stencil_back_func_func));
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} else {
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back.action_stencil_fail.Assign(front.action_stencil_fail);
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back.action_depth_fail.Assign(front.action_depth_fail);
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back.action_depth_pass.Assign(front.action_depth_pass);
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back.test_func.Assign(front.test_func);
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}
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stencil_enable.Assign(regs.stencil_enable);
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depth_write_enable.Assign(regs.depth_write_enabled);
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depth_bounds_enable.Assign(regs.depth_bounds_enable);
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depth_test_enable.Assign(regs.depth_test_enable);
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front_face.Assign(packed_front_face);
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depth_test_func.Assign(PackComparisonOp(regs.depth_test_func));
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topology.Assign(topology_index);
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cull_face.Assign(PackCullFace(regs.cull_face));
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cull_enable.Assign(regs.cull_test_enabled != 0 ? 1 : 0);
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for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
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const auto& input = regs.vertex_array[index];
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VertexBinding& binding = vertex_bindings[index];
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binding.raw = 0;
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binding.enabled.Assign(input.IsEnabled() ? 1 : 0);
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binding.stride.Assign(static_cast<u16>(input.stride.Value()));
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}
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}
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void FixedPipelineState::Fill(const Maxwell& regs) {
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vertex_input.Fill(regs);
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rasterizer.Fill(regs);
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depth_stencil.Fill(regs);
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color_blending.Fill(regs);
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viewport_swizzles.Fill(regs);
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dynamic_state.Fill(regs);
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}
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std::size_t FixedPipelineState::Hash() const noexcept {
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@ -60,14 +60,6 @@ struct FixedPipelineState {
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void Fill(const Maxwell& regs, std::size_t index);
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std::size_t Hash() const noexcept;
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bool operator==(const BlendingAttachment& rhs) const noexcept;
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bool operator!=(const BlendingAttachment& rhs) const noexcept {
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return !operator==(rhs);
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}
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constexpr std::array<bool, 4> Mask() const noexcept {
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return {mask_r != 0, mask_g != 0, mask_b != 0, mask_a != 0};
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}
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@ -98,12 +90,6 @@ struct FixedPipelineState {
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};
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struct VertexInput {
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union Binding {
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u16 raw;
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BitField<0, 1, u16> enabled;
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BitField<1, 12, u16> stride;
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};
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union Attribute {
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u32 raw;
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BitField<0, 1, u32> enabled;
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@ -121,111 +107,33 @@ struct FixedPipelineState {
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}
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};
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std::array<Binding, Maxwell::NumVertexArrays> bindings;
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std::array<u32, Maxwell::NumVertexArrays> binding_divisors;
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std::array<Attribute, Maxwell::NumVertexAttributes> attributes;
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void SetBinding(std::size_t index, bool enabled, u32 stride, u32 divisor) noexcept {
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auto& binding = bindings[index];
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binding.raw = 0;
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binding.enabled.Assign(enabled ? 1 : 0);
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binding.stride.Assign(static_cast<u16>(stride));
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binding_divisors[index] = divisor;
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}
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void SetAttribute(std::size_t index, bool enabled, u32 buffer, u32 offset,
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Maxwell::VertexAttribute::Type type,
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Maxwell::VertexAttribute::Size size) noexcept {
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auto& attribute = attributes[index];
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attribute.raw = 0;
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attribute.enabled.Assign(enabled ? 1 : 0);
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attribute.buffer.Assign(buffer);
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attribute.offset.Assign(offset);
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attribute.type.Assign(static_cast<u32>(type));
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attribute.size.Assign(static_cast<u32>(size));
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}
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void Fill(const Maxwell& regs) noexcept;
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};
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struct Rasterizer {
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union {
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u32 raw;
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BitField<0, 4, u32> topology;
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BitField<4, 1, u32> primitive_restart_enable;
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BitField<5, 1, u32> cull_enable;
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BitField<6, 1, u32> depth_bias_enable;
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BitField<7, 1, u32> depth_clamp_disabled;
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BitField<8, 1, u32> ndc_minus_one_to_one;
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BitField<9, 2, u32> cull_face;
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BitField<11, 1, u32> front_face;
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BitField<12, 2, u32> polygon_mode;
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BitField<14, 5, u32> patch_control_points_minus_one;
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BitField<19, 2, u32> tessellation_primitive;
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BitField<21, 2, u32> tessellation_spacing;
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BitField<23, 1, u32> tessellation_clockwise;
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BitField<24, 1, u32> logic_op_enable;
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BitField<25, 4, u32> logic_op;
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BitField<29, 1, u32> rasterize_enable;
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BitField<0, 1, u32> primitive_restart_enable;
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BitField<1, 1, u32> depth_bias_enable;
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BitField<2, 1, u32> depth_clamp_disabled;
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BitField<3, 1, u32> ndc_minus_one_to_one;
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BitField<4, 2, u32> polygon_mode;
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BitField<6, 5, u32> patch_control_points_minus_one;
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BitField<11, 2, u32> tessellation_primitive;
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BitField<13, 2, u32> tessellation_spacing;
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BitField<15, 1, u32> tessellation_clockwise;
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BitField<16, 1, u32> logic_op_enable;
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BitField<17, 4, u32> logic_op;
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BitField<21, 1, u32> rasterize_enable;
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};
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// TODO(Rodrigo): Move this to push constants
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u32 point_size;
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void Fill(const Maxwell& regs) noexcept;
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constexpr Maxwell::PrimitiveTopology Topology() const noexcept {
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return static_cast<Maxwell::PrimitiveTopology>(topology.Value());
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}
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Maxwell::CullFace CullFace() const noexcept {
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return UnpackCullFace(cull_face.Value());
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}
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Maxwell::FrontFace FrontFace() const noexcept {
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return UnpackFrontFace(front_face.Value());
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}
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};
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struct DepthStencil {
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template <std::size_t Position>
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union StencilFace {
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BitField<Position + 0, 3, u32> action_stencil_fail;
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BitField<Position + 3, 3, u32> action_depth_fail;
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BitField<Position + 6, 3, u32> action_depth_pass;
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BitField<Position + 9, 3, u32> test_func;
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Maxwell::StencilOp ActionStencilFail() const noexcept {
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return UnpackStencilOp(action_stencil_fail);
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}
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Maxwell::StencilOp ActionDepthFail() const noexcept {
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return UnpackStencilOp(action_depth_fail);
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}
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Maxwell::StencilOp ActionDepthPass() const noexcept {
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return UnpackStencilOp(action_depth_pass);
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}
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Maxwell::ComparisonOp TestFunc() const noexcept {
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return UnpackComparisonOp(test_func);
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}
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};
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union {
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u32 raw;
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StencilFace<0> front;
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StencilFace<12> back;
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BitField<24, 1, u32> depth_test_enable;
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BitField<25, 1, u32> depth_write_enable;
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BitField<26, 1, u32> depth_bounds_enable;
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BitField<27, 1, u32> stencil_enable;
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BitField<28, 3, u32> depth_test_func;
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};
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void Fill(const Maxwell& regs) noexcept;
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Maxwell::ComparisonOp DepthTestFunc() const noexcept {
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return UnpackComparisonOp(depth_test_func);
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}
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};
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struct ColorBlending {
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@ -240,11 +148,80 @@ struct FixedPipelineState {
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void Fill(const Maxwell& regs) noexcept;
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};
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template <std::size_t Position>
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union StencilFace {
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BitField<Position + 0, 3, u32> action_stencil_fail;
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BitField<Position + 3, 3, u32> action_depth_fail;
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BitField<Position + 6, 3, u32> action_depth_pass;
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BitField<Position + 9, 3, u32> test_func;
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Maxwell::StencilOp ActionStencilFail() const noexcept {
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return UnpackStencilOp(action_stencil_fail);
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}
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Maxwell::StencilOp ActionDepthFail() const noexcept {
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return UnpackStencilOp(action_depth_fail);
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}
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Maxwell::StencilOp ActionDepthPass() const noexcept {
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return UnpackStencilOp(action_depth_pass);
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}
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Maxwell::ComparisonOp TestFunc() const noexcept {
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return UnpackComparisonOp(test_func);
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}
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};
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union VertexBinding {
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u16 raw;
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BitField<0, 12, u16> stride;
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BitField<12, 1, u16> enabled;
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};
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struct DynamicState {
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union {
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u32 raw1;
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StencilFace<0> front;
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StencilFace<12> back;
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BitField<24, 1, u32> stencil_enable;
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BitField<25, 1, u32> depth_write_enable;
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BitField<26, 1, u32> depth_bounds_enable;
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BitField<27, 1, u32> depth_test_enable;
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BitField<28, 1, u32> front_face;
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BitField<29, 3, u32> depth_test_func;
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};
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union {
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u32 raw2;
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BitField<0, 4, u32> topology;
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BitField<4, 2, u32> cull_face;
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BitField<6, 1, u32> cull_enable;
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};
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std::array<VertexBinding, Maxwell::NumVertexArrays> vertex_bindings;
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void Fill(const Maxwell& regs);
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Maxwell::ComparisonOp DepthTestFunc() const noexcept {
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return UnpackComparisonOp(depth_test_func);
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}
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Maxwell::CullFace CullFace() const noexcept {
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return UnpackCullFace(cull_face.Value());
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}
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Maxwell::FrontFace FrontFace() const noexcept {
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return UnpackFrontFace(front_face.Value());
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}
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constexpr Maxwell::PrimitiveTopology Topology() const noexcept {
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return static_cast<Maxwell::PrimitiveTopology>(topology.Value());
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}
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};
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VertexInput vertex_input;
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Rasterizer rasterizer;
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DepthStencil depth_stencil;
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ColorBlending color_blending;
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ViewportSwizzles viewport_swizzles;
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DynamicState dynamic_state;
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void Fill(const Maxwell& regs);
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@ -177,15 +177,15 @@ std::vector<vk::ShaderModule> VKGraphicsPipeline::CreateShaderModules(
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vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpass_params,
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const SPIRVProgram& program) const {
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const auto& vi = fixed_state.vertex_input;
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const auto& ds = fixed_state.depth_stencil;
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const auto& cd = fixed_state.color_blending;
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const auto& rs = fixed_state.rasterizer;
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const auto& ds = fixed_state.dynamic_state;
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const auto& viewport_swizzles = fixed_state.viewport_swizzles.swizzles;
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std::vector<VkVertexInputBindingDescription> vertex_bindings;
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std::vector<VkVertexInputBindingDivisorDescriptionEXT> vertex_binding_divisors;
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for (std::size_t index = 0; index < std::size(vi.bindings); ++index) {
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const auto& binding = vi.bindings[index];
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for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
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const auto& binding = ds.vertex_bindings[index];
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if (!binding.enabled) {
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continue;
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}
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@ -244,7 +244,7 @@ vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpa
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input_assembly_ci.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO;
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input_assembly_ci.pNext = nullptr;
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input_assembly_ci.flags = 0;
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input_assembly_ci.topology = MaxwellToVK::PrimitiveTopology(device, rs.Topology());
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input_assembly_ci.topology = MaxwellToVK::PrimitiveTopology(device, ds.Topology());
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input_assembly_ci.primitiveRestartEnable =
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rs.primitive_restart_enable != 0 && SupportsPrimitiveRestart(input_assembly_ci.topology);
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@ -284,8 +284,8 @@ vk::Pipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpa
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rasterization_ci.rasterizerDiscardEnable = rs.rasterize_enable == 0 ? VK_TRUE : VK_FALSE;
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rasterization_ci.polygonMode = VK_POLYGON_MODE_FILL;
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rasterization_ci.cullMode =
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rs.cull_enable ? MaxwellToVK::CullFace(rs.CullFace()) : VK_CULL_MODE_NONE;
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rasterization_ci.frontFace = MaxwellToVK::FrontFace(rs.FrontFace());
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ds.cull_enable ? MaxwellToVK::CullFace(ds.CullFace()) : VK_CULL_MODE_NONE;
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rasterization_ci.frontFace = MaxwellToVK::FrontFace(ds.FrontFace());
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rasterization_ci.depthBiasEnable = rs.depth_bias_enable;
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rasterization_ci.depthBiasConstantFactor = 0.0f;
|
||||
rasterization_ci.depthBiasClamp = 0.0f;
|
||||
|
|
|
|||
|
|
@ -312,7 +312,7 @@ VKPipelineCache::DecompileShaders(const GraphicsPipelineCacheKey& key) {
|
|||
const auto& gpu = system.GPU().Maxwell3D();
|
||||
|
||||
Specialization specialization;
|
||||
if (fixed_state.rasterizer.Topology() == Maxwell::PrimitiveTopology::Points) {
|
||||
if (fixed_state.dynamic_state.Topology() == Maxwell::PrimitiveTopology::Points) {
|
||||
float point_size;
|
||||
std::memcpy(&point_size, &fixed_state.rasterizer.point_size, sizeof(float));
|
||||
specialization.point_size = point_size;
|
||||
|
|
|
|||
|
|
@ -44,10 +44,10 @@ class VKUpdateDescriptorQueue;
|
|||
using Maxwell = Tegra::Engines::Maxwell3D::Regs;
|
||||
|
||||
struct GraphicsPipelineCacheKey {
|
||||
FixedPipelineState fixed_state;
|
||||
RenderPassParams renderpass_params;
|
||||
u32 padding;
|
||||
std::array<GPUVAddr, Maxwell::MaxShaderProgram> shaders;
|
||||
u64 padding; // This is necessary for unique object representations
|
||||
FixedPipelineState fixed_state;
|
||||
|
||||
std::size_t Hash() const noexcept;
|
||||
|
||||
|
|
|
|||
|
|
@ -822,7 +822,7 @@ RasterizerVulkan::DrawParameters RasterizerVulkan::SetupGeometry(FixedPipelineSt
|
|||
const auto& gpu = system.GPU().Maxwell3D();
|
||||
const auto& regs = gpu.regs;
|
||||
|
||||
SetupVertexArrays(fixed_state.vertex_input, buffer_bindings);
|
||||
SetupVertexArrays(buffer_bindings);
|
||||
|
||||
const u32 base_instance = regs.vb_base_instance;
|
||||
const u32 num_instances = is_instanced ? gpu.mme_draw.instance_count : 1;
|
||||
|
|
@ -940,30 +940,14 @@ void RasterizerVulkan::EndTransformFeedback() {
|
|||
[](vk::CommandBuffer cmdbuf) { cmdbuf.EndTransformFeedbackEXT(0, 0, nullptr, nullptr); });
|
||||
}
|
||||
|
||||
void RasterizerVulkan::SetupVertexArrays(FixedPipelineState::VertexInput& vertex_input,
|
||||
BufferBindings& buffer_bindings) {
|
||||
void RasterizerVulkan::SetupVertexArrays(BufferBindings& buffer_bindings) {
|
||||
const auto& regs = system.GPU().Maxwell3D().regs;
|
||||
|
||||
for (std::size_t index = 0; index < Maxwell::NumVertexAttributes; ++index) {
|
||||
const auto& attrib = regs.vertex_attrib_format[index];
|
||||
if (attrib.IsConstant()) {
|
||||
vertex_input.SetAttribute(index, false, 0, 0, {}, {});
|
||||
continue;
|
||||
}
|
||||
vertex_input.SetAttribute(index, true, attrib.buffer, attrib.offset, attrib.type.Value(),
|
||||
attrib.size.Value());
|
||||
}
|
||||
|
||||
for (std::size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
|
||||
const auto& vertex_array = regs.vertex_array[index];
|
||||
if (!vertex_array.IsEnabled()) {
|
||||
vertex_input.SetBinding(index, false, 0, 0);
|
||||
continue;
|
||||
}
|
||||
vertex_input.SetBinding(
|
||||
index, true, vertex_array.stride,
|
||||
regs.instanced_arrays.IsInstancingEnabled(index) ? vertex_array.divisor : 0);
|
||||
|
||||
const GPUVAddr start{vertex_array.StartAddress()};
|
||||
const GPUVAddr end{regs.vertex_array_limit[index].LimitAddress()};
|
||||
|
||||
|
|
|
|||
|
|
@ -185,8 +185,7 @@ private:
|
|||
|
||||
bool WalkAttachmentOverlaps(const CachedSurfaceView& attachment);
|
||||
|
||||
void SetupVertexArrays(FixedPipelineState::VertexInput& vertex_input,
|
||||
BufferBindings& buffer_bindings);
|
||||
void SetupVertexArrays(BufferBindings& buffer_bindings);
|
||||
|
||||
void SetupIndexBuffer(BufferBindings& buffer_bindings, DrawParameters& params, bool is_indexed);
|
||||
|
||||
|
|
|
|||
Reference in New Issue