Merge pull request #6629 from FernandoS27/accel-dma-2
DMAEngine: Accelerate BufferClear [accelerateDMA Part 2]
This commit is contained in:
commit
c53b688411
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@ -164,11 +164,16 @@ public:
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/// Pop asynchronous downloads
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/// Pop asynchronous downloads
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void PopAsyncFlushes();
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void PopAsyncFlushes();
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[[nodiscard]] bool DMACopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount);
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bool DMACopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount);
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bool DMAClear(GPUVAddr src_address, u64 amount, u32 value);
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/// Return true when a CPU region is modified from the GPU
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/// Return true when a CPU region is modified from the GPU
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[[nodiscard]] bool IsRegionGpuModified(VAddr addr, size_t size);
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[[nodiscard]] bool IsRegionGpuModified(VAddr addr, size_t size);
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/// Return true when a region is registered on the cache
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[[nodiscard]] bool IsRegionRegistered(VAddr addr, size_t size);
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/// Return true when a CPU region is modified from the CPU
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/// Return true when a CPU region is modified from the CPU
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[[nodiscard]] bool IsRegionCpuModified(VAddr addr, size_t size);
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[[nodiscard]] bool IsRegionCpuModified(VAddr addr, size_t size);
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@ -324,6 +329,8 @@ private:
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[[nodiscard]] bool HasFastUniformBufferBound(size_t stage, u32 binding_index) const noexcept;
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[[nodiscard]] bool HasFastUniformBufferBound(size_t stage, u32 binding_index) const noexcept;
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void ClearDownload(IntervalType subtract_interval);
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VideoCore::RasterizerInterface& rasterizer;
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VideoCore::RasterizerInterface& rasterizer;
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Tegra::Engines::Maxwell3D& maxwell3d;
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Tegra::Engines::Maxwell3D& maxwell3d;
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Tegra::Engines::KeplerCompute& kepler_compute;
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Tegra::Engines::KeplerCompute& kepler_compute;
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@ -462,6 +469,14 @@ void BufferCache<P>::DownloadMemory(VAddr cpu_addr, u64 size) {
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});
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});
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}
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}
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template <class P>
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void BufferCache<P>::ClearDownload(IntervalType subtract_interval) {
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uncommitted_ranges.subtract(subtract_interval);
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for (auto& interval_set : committed_ranges) {
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interval_set.subtract(subtract_interval);
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}
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}
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template <class P>
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template <class P>
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bool BufferCache<P>::DMACopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount) {
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bool BufferCache<P>::DMACopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount) {
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const std::optional<VAddr> cpu_src_address = gpu_memory.GpuToCpuAddress(src_address);
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const std::optional<VAddr> cpu_src_address = gpu_memory.GpuToCpuAddress(src_address);
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@ -469,17 +484,14 @@ bool BufferCache<P>::DMACopy(GPUVAddr src_address, GPUVAddr dest_address, u64 am
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if (!cpu_src_address || !cpu_dest_address) {
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if (!cpu_src_address || !cpu_dest_address) {
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return false;
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return false;
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}
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}
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const bool source_dirty = IsRegionGpuModified(*cpu_src_address, amount);
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const bool source_dirty = IsRegionRegistered(*cpu_src_address, amount);
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const bool dest_dirty = IsRegionGpuModified(*cpu_dest_address, amount);
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const bool dest_dirty = IsRegionRegistered(*cpu_dest_address, amount);
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if (!source_dirty && !dest_dirty) {
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if (!source_dirty && !dest_dirty) {
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return false;
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return false;
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}
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}
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const IntervalType subtract_interval{*cpu_dest_address, *cpu_dest_address + amount};
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const IntervalType subtract_interval{*cpu_dest_address, *cpu_dest_address + amount};
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uncommitted_ranges.subtract(subtract_interval);
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ClearDownload(subtract_interval);
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for (auto& interval_set : committed_ranges) {
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interval_set.subtract(subtract_interval);
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}
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BufferId buffer_a;
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BufferId buffer_a;
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BufferId buffer_b;
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BufferId buffer_b;
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@ -510,12 +522,13 @@ bool BufferCache<P>::DMACopy(GPUVAddr src_address, GPUVAddr dest_address, u64 am
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ForEachWrittenRange(*cpu_src_address, amount, mirror);
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ForEachWrittenRange(*cpu_src_address, amount, mirror);
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// This subtraction in this order is important for overlapping copies.
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// This subtraction in this order is important for overlapping copies.
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common_ranges.subtract(subtract_interval);
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common_ranges.subtract(subtract_interval);
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bool atleast_1_download = tmp_intervals.size() != 0;
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for (const IntervalType add_interval : tmp_intervals) {
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for (const IntervalType add_interval : tmp_intervals) {
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common_ranges.add(add_interval);
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common_ranges.add(add_interval);
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}
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}
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runtime.CopyBuffer(dest_buffer, src_buffer, copies);
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runtime.CopyBuffer(dest_buffer, src_buffer, copies);
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if (source_dirty) {
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if (atleast_1_download) {
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dest_buffer.MarkRegionAsGpuModified(*cpu_dest_address, amount);
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dest_buffer.MarkRegionAsGpuModified(*cpu_dest_address, amount);
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}
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}
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std::vector<u8> tmp_buffer(amount);
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std::vector<u8> tmp_buffer(amount);
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@ -524,6 +537,33 @@ bool BufferCache<P>::DMACopy(GPUVAddr src_address, GPUVAddr dest_address, u64 am
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return true;
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return true;
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}
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}
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template <class P>
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bool BufferCache<P>::DMAClear(GPUVAddr dst_address, u64 amount, u32 value) {
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const std::optional<VAddr> cpu_dst_address = gpu_memory.GpuToCpuAddress(dst_address);
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if (!cpu_dst_address) {
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return false;
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}
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const bool dest_dirty = IsRegionRegistered(*cpu_dst_address, amount);
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if (!dest_dirty) {
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return false;
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}
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const size_t size = amount * sizeof(u32);
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const IntervalType subtract_interval{*cpu_dst_address, *cpu_dst_address + size};
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ClearDownload(subtract_interval);
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common_ranges.subtract(subtract_interval);
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BufferId buffer;
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do {
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has_deleted_buffers = false;
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buffer = FindBuffer(*cpu_dst_address, static_cast<u32>(size));
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} while (has_deleted_buffers);
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auto& dest_buffer = slot_buffers[buffer];
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const u32 offset = static_cast<u32>(*cpu_dst_address - dest_buffer.CpuAddr());
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runtime.ClearBuffer(dest_buffer, offset, size, value);
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return true;
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}
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template <class P>
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template <class P>
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void BufferCache<P>::BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr,
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void BufferCache<P>::BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr,
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u32 size) {
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u32 size) {
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@ -781,6 +821,27 @@ bool BufferCache<P>::IsRegionGpuModified(VAddr addr, size_t size) {
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return false;
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return false;
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}
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}
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template <class P>
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bool BufferCache<P>::IsRegionRegistered(VAddr addr, size_t size) {
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const VAddr end_addr = addr + size;
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const u64 page_end = Common::DivCeil(end_addr, PAGE_SIZE);
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for (u64 page = addr >> PAGE_BITS; page < page_end;) {
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const BufferId buffer_id = page_table[page];
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if (!buffer_id) {
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++page;
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continue;
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}
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Buffer& buffer = slot_buffers[buffer_id];
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const VAddr buf_start_addr = buffer.CpuAddr();
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const VAddr buf_end_addr = buf_start_addr + buffer.SizeBytes();
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if (buf_start_addr < end_addr && addr < buf_end_addr) {
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return true;
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}
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page = Common::DivCeil(end_addr, PAGE_SIZE);
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}
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return false;
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}
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template <class P>
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template <class P>
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bool BufferCache<P>::IsRegionCpuModified(VAddr addr, size_t size) {
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bool BufferCache<P>::IsRegionCpuModified(VAddr addr, size_t size) {
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const u64 page_end = Common::DivCeil(addr + size, PAGE_SIZE);
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const u64 page_end = Common::DivCeil(addr + size, PAGE_SIZE);
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@ -1425,6 +1486,7 @@ void BufferCache<P>::DownloadBufferMemory(Buffer& buffer, VAddr cpu_addr, u64 si
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const VAddr end_address = start_address + range_size;
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const VAddr end_address = start_address + range_size;
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ForEachWrittenRange(start_address, range_size, add_download);
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ForEachWrittenRange(start_address, range_size, add_download);
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const IntervalType subtract_interval{start_address, end_address};
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const IntervalType subtract_interval{start_address, end_address};
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ClearDownload(subtract_interval);
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common_ranges.subtract(subtract_interval);
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common_ranges.subtract(subtract_interval);
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});
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});
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if (total_size_bytes == 0) {
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if (total_size_bytes == 0) {
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@ -4,6 +4,7 @@
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#include "common/assert.h"
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#include "common/assert.h"
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#include "common/logging/log.h"
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#include "common/logging/log.h"
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#include "common/microprofile.h"
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#include "common/settings.h"
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#include "common/settings.h"
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#include "core/core.h"
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#include "core/core.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/engines/maxwell_3d.h"
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@ -12,6 +13,9 @@
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#include "video_core/renderer_base.h"
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#include "video_core/renderer_base.h"
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#include "video_core/textures/decoders.h"
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#include "video_core/textures/decoders.h"
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MICROPROFILE_DECLARE(GPU_DMAEngine);
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MICROPROFILE_DEFINE(GPU_DMAEngine, "GPU", "DMA Engine", MP_RGB(224, 224, 128));
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namespace Tegra::Engines {
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namespace Tegra::Engines {
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using namespace Texture;
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using namespace Texture;
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@ -43,6 +47,7 @@ void MaxwellDMA::CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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}
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}
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void MaxwellDMA::Launch() {
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void MaxwellDMA::Launch() {
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MICROPROFILE_SCOPE(GPU_DMAEngine);
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LOG_TRACE(Render_OpenGL, "DMA copy 0x{:x} -> 0x{:x}", static_cast<GPUVAddr>(regs.offset_in),
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LOG_TRACE(Render_OpenGL, "DMA copy 0x{:x} -> 0x{:x}", static_cast<GPUVAddr>(regs.offset_in),
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static_cast<GPUVAddr>(regs.offset_out));
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static_cast<GPUVAddr>(regs.offset_out));
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@ -87,8 +92,10 @@ void MaxwellDMA::CopyPitchToPitch() {
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// TODO: allow multisized components.
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// TODO: allow multisized components.
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if (is_buffer_clear) {
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if (is_buffer_clear) {
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ASSERT(regs.remap_const.component_size_minus_one == 3);
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ASSERT(regs.remap_const.component_size_minus_one == 3);
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accelerate.BufferClear(regs.offset_out, regs.line_length_in, regs.remap_consta_value);
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std::vector<u32> tmp_buffer(regs.line_length_in, regs.remap_consta_value);
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std::vector<u32> tmp_buffer(regs.line_length_in, regs.remap_consta_value);
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memory_manager.WriteBlock(regs.offset_out, reinterpret_cast<u8*>(tmp_buffer.data()),
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memory_manager.WriteBlockUnsafe(regs.offset_out,
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reinterpret_cast<u8*>(tmp_buffer.data()),
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regs.line_length_in * sizeof(u32));
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regs.line_length_in * sizeof(u32));
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return;
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return;
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}
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}
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@ -179,8 +186,13 @@ void MaxwellDMA::CopyPitchToBlockLinear() {
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write_buffer.resize(dst_size);
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write_buffer.resize(dst_size);
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}
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}
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if (Settings::IsGPULevelExtreme()) {
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memory_manager.ReadBlock(regs.offset_in, read_buffer.data(), src_size);
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memory_manager.ReadBlock(regs.offset_in, read_buffer.data(), src_size);
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memory_manager.ReadBlock(regs.offset_out, write_buffer.data(), dst_size);
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memory_manager.ReadBlock(regs.offset_out, write_buffer.data(), dst_size);
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} else {
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memory_manager.ReadBlockUnsafe(regs.offset_in, read_buffer.data(), src_size);
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memory_manager.ReadBlockUnsafe(regs.offset_out, write_buffer.data(), dst_size);
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}
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// If the input is linear and the output is tiled, swizzle the input and copy it over.
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// If the input is linear and the output is tiled, swizzle the input and copy it over.
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if (regs.dst_params.block_size.depth > 0) {
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if (regs.dst_params.block_size.depth > 0) {
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@ -31,6 +31,8 @@ class AccelerateDMAInterface {
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public:
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public:
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/// Write the value to the register identified by method.
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/// Write the value to the register identified by method.
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virtual bool BufferCopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount) = 0;
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virtual bool BufferCopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount) = 0;
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virtual bool BufferClear(GPUVAddr src_address, u64 amount, u32 value) = 0;
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};
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};
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/**
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/**
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@ -98,6 +98,12 @@ void BufferCacheRuntime::CopyBuffer(Buffer& dst_buffer, Buffer& src_buffer,
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}
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}
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}
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}
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void BufferCacheRuntime::ClearBuffer(Buffer& dest_buffer, u32 offset, size_t size, u32 value) {
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glClearNamedBufferSubData(dest_buffer.Handle(), GL_R32UI, static_cast<GLintptr>(offset),
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static_cast<GLsizeiptr>(size / sizeof(u32)), GL_RGBA, GL_UNSIGNED_INT,
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&value);
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}
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void BufferCacheRuntime::BindIndexBuffer(Buffer& buffer, u32 offset, u32 size) {
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void BufferCacheRuntime::BindIndexBuffer(Buffer& buffer, u32 offset, u32 size) {
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if (has_unified_vertex_buffers) {
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if (has_unified_vertex_buffers) {
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buffer.MakeResident(GL_READ_ONLY);
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buffer.MakeResident(GL_READ_ONLY);
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@ -57,6 +57,8 @@ public:
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void CopyBuffer(Buffer& dst_buffer, Buffer& src_buffer,
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void CopyBuffer(Buffer& dst_buffer, Buffer& src_buffer,
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std::span<const VideoCommon::BufferCopy> copies);
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std::span<const VideoCommon::BufferCopy> copies);
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void ClearBuffer(Buffer& dest_buffer, u32 offset, size_t size, u32 value);
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void BindIndexBuffer(Buffer& buffer, u32 offset, u32 size);
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void BindIndexBuffer(Buffer& buffer, u32 offset, u32 size);
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void BindVertexBuffer(u32 index, Buffer& buffer, u32 offset, u32 size, u32 stride);
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void BindVertexBuffer(u32 index, Buffer& buffer, u32 offset, u32 size, u32 stride);
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@ -1407,4 +1407,9 @@ bool AccelerateDMA::BufferCopy(GPUVAddr src_address, GPUVAddr dest_address, u64
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return buffer_cache.DMACopy(src_address, dest_address, amount);
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return buffer_cache.DMACopy(src_address, dest_address, amount);
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}
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}
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bool AccelerateDMA::BufferClear(GPUVAddr src_address, u64 amount, u32 value) {
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std::scoped_lock lock{buffer_cache.mutex};
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return buffer_cache.DMAClear(src_address, amount, value);
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}
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} // namespace OpenGL
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} // namespace OpenGL
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@ -65,6 +65,8 @@ public:
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bool BufferCopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount) override;
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bool BufferCopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount) override;
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bool BufferClear(GPUVAddr src_address, u64 amount, u32 value) override;
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private:
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private:
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BufferCache& buffer_cache;
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BufferCache& buffer_cache;
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};
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};
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@ -136,6 +136,30 @@ void BufferCacheRuntime::CopyBuffer(VkBuffer dst_buffer, VkBuffer src_buffer,
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});
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});
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}
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}
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void BufferCacheRuntime::ClearBuffer(VkBuffer dest_buffer, u32 offset, size_t size, u32 value) {
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static constexpr VkMemoryBarrier READ_BARRIER{
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.sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
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.pNext = nullptr,
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.srcAccessMask = VK_ACCESS_MEMORY_WRITE_BIT,
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.dstAccessMask = VK_ACCESS_TRANSFER_READ_BIT | VK_ACCESS_TRANSFER_WRITE_BIT,
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};
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static constexpr VkMemoryBarrier WRITE_BARRIER{
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.sType = VK_STRUCTURE_TYPE_MEMORY_BARRIER,
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.pNext = nullptr,
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.srcAccessMask = VK_ACCESS_TRANSFER_WRITE_BIT,
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.dstAccessMask = VK_ACCESS_MEMORY_READ_BIT | VK_ACCESS_MEMORY_WRITE_BIT,
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};
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scheduler.RequestOutsideRenderPassOperationContext();
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scheduler.Record([dest_buffer, offset, size, value](vk::CommandBuffer cmdbuf) {
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cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_ALL_COMMANDS_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT,
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0, READ_BARRIER);
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cmdbuf.FillBuffer(dest_buffer, offset, size, value);
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cmdbuf.PipelineBarrier(VK_PIPELINE_STAGE_TRANSFER_BIT, VK_PIPELINE_STAGE_ALL_COMMANDS_BIT,
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0, WRITE_BARRIER);
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});
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}
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void BufferCacheRuntime::BindIndexBuffer(PrimitiveTopology topology, IndexFormat index_format,
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void BufferCacheRuntime::BindIndexBuffer(PrimitiveTopology topology, IndexFormat index_format,
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u32 base_vertex, u32 num_indices, VkBuffer buffer,
|
u32 base_vertex, u32 num_indices, VkBuffer buffer,
|
||||||
u32 offset, [[maybe_unused]] u32 size) {
|
u32 offset, [[maybe_unused]] u32 size) {
|
||||||
|
|
|
@ -60,6 +60,8 @@ public:
|
||||||
void CopyBuffer(VkBuffer src_buffer, VkBuffer dst_buffer,
|
void CopyBuffer(VkBuffer src_buffer, VkBuffer dst_buffer,
|
||||||
std::span<const VideoCommon::BufferCopy> copies);
|
std::span<const VideoCommon::BufferCopy> copies);
|
||||||
|
|
||||||
|
void ClearBuffer(VkBuffer dest_buffer, u32 offset, size_t size, u32 value);
|
||||||
|
|
||||||
void BindIndexBuffer(PrimitiveTopology topology, IndexFormat index_format, u32 num_indices,
|
void BindIndexBuffer(PrimitiveTopology topology, IndexFormat index_format, u32 num_indices,
|
||||||
u32 base_vertex, VkBuffer buffer, u32 offset, u32 size);
|
u32 base_vertex, VkBuffer buffer, u32 offset, u32 size);
|
||||||
|
|
||||||
|
|
|
@ -706,6 +706,11 @@ void RasterizerVulkan::FlushWork() {
|
||||||
|
|
||||||
AccelerateDMA::AccelerateDMA(BufferCache& buffer_cache_) : buffer_cache{buffer_cache_} {}
|
AccelerateDMA::AccelerateDMA(BufferCache& buffer_cache_) : buffer_cache{buffer_cache_} {}
|
||||||
|
|
||||||
|
bool AccelerateDMA::BufferClear(GPUVAddr src_address, u64 amount, u32 value) {
|
||||||
|
std::scoped_lock lock{buffer_cache.mutex};
|
||||||
|
return buffer_cache.DMAClear(src_address, amount, value);
|
||||||
|
}
|
||||||
|
|
||||||
bool AccelerateDMA::BufferCopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount) {
|
bool AccelerateDMA::BufferCopy(GPUVAddr src_address, GPUVAddr dest_address, u64 amount) {
|
||||||
std::scoped_lock lock{buffer_cache.mutex};
|
std::scoped_lock lock{buffer_cache.mutex};
|
||||||
return buffer_cache.DMACopy(src_address, dest_address, amount);
|
return buffer_cache.DMACopy(src_address, dest_address, amount);
|
||||||
|
|
|
@ -56,6 +56,8 @@ public:
|
||||||
|
|
||||||
bool BufferCopy(GPUVAddr start_address, GPUVAddr end_address, u64 amount) override;
|
bool BufferCopy(GPUVAddr start_address, GPUVAddr end_address, u64 amount) override;
|
||||||
|
|
||||||
|
bool BufferClear(GPUVAddr src_address, u64 amount, u32 value) override;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
BufferCache& buffer_cache;
|
BufferCache& buffer_cache;
|
||||||
};
|
};
|
||||||
|
|
Reference in New Issue