VideoCore: Update MemoryManager
This commit is contained in:
Fernando Sahmkow
parent
b617874724
commit
cbaf3fb433
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@ -4,4 +4,5 @@ namespace Common {
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template class Common::MultiLevelPageTable<GPUVAddr>;
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template class Common::MultiLevelPageTable<VAddr>;
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template class Common::MultiLevelPageTable<PAddr>;
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template class Common::MultiLevelPageTable<u32>;
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} // namespace Common
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@ -20,7 +20,7 @@ MultiLevelPageTable<BaseAddr>::MultiLevelPageTable(std::size_t address_space_bit
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: address_space_bits{address_space_bits_},
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first_level_bits{first_level_bits_}, page_bits{page_bits_} {
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first_level_shift = address_space_bits - first_level_bits;
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first_level_chunk_size = 1ULL << (first_level_shift - page_bits);
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first_level_chunk_size = (1ULL << (first_level_shift - page_bits)) * sizeof(BaseAddr);
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alloc_size = (1ULL << (address_space_bits - page_bits)) * sizeof(BaseAddr);
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std::size_t first_level_size = 1ULL << first_level_bits;
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first_level_map.resize(first_level_size, nullptr);
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@ -53,8 +53,7 @@ MultiLevelPageTable<BaseAddr>::~MultiLevelPageTable() noexcept {
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template <typename BaseAddr>
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void MultiLevelPageTable<BaseAddr>::ReserveRange(u64 start, std::size_t size) {
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const u64 new_start = start >> first_level_shift;
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const u64 new_end =
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(start + size + (first_level_chunk_size << page_bits) - 1) >> first_level_shift;
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const u64 new_end = (start + size) >> first_level_shift;
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for (u64 i = new_start; i <= new_end; i++) {
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if (!first_level_map[i]) {
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AllocateLevel(i);
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@ -64,7 +63,7 @@ void MultiLevelPageTable<BaseAddr>::ReserveRange(u64 start, std::size_t size) {
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template <typename BaseAddr>
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void MultiLevelPageTable<BaseAddr>::AllocateLevel(u64 level) {
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void* ptr = reinterpret_cast<char*>(base_ptr) + level * first_level_chunk_size;
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void* ptr = reinterpret_cast<char *>(base_ptr) + level * first_level_chunk_size;
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#ifdef _WIN32
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void* base{VirtualAlloc(ptr, first_level_chunk_size, MEM_COMMIT, PAGE_READWRITE)};
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#else
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@ -16,36 +16,63 @@
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namespace Tegra {
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MemoryManager::MemoryManager(Core::System& system_)
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: system{system_}, page_table(page_table_size) {}
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MemoryManager::MemoryManager(Core::System& system_, u64 address_space_bits_, u64 page_bits_)
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: system{system_}, address_space_bits{address_space_bits_}, page_bits{page_bits_}, entries{},
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page_table{address_space_bits, address_space_bits + page_bits - 38, page_bits} {
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address_space_size = 1ULL << address_space_bits;
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allocate_start = address_space_bits > 32 ? 1ULL << 32 : 0;
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page_size = 1ULL << page_bits;
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page_mask = page_size - 1ULL;
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const u64 page_table_bits = address_space_bits - cpu_page_bits;
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const u64 page_table_size = 1ULL << page_table_bits;
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page_table_mask = page_table_size - 1;
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entries.resize(page_table_size / 32, 0);
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}
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MemoryManager::~MemoryManager() = default;
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void MemoryManager::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
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rasterizer = rasterizer_;
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MemoryManager::EntryType MemoryManager::GetEntry(size_t position) const {
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position = position >> page_bits;
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const u64 entry_mask = entries[position / 32];
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const size_t sub_index = position % 32;
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return static_cast<EntryType>((entry_mask >> (2 * sub_index)) & 0x03ULL);
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}
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GPUVAddr MemoryManager::UpdateRange(GPUVAddr gpu_addr, PageEntry page_entry, std::size_t size) {
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void MemoryManager::SetEntry(size_t position, MemoryManager::EntryType entry) {
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position = position >> page_bits;
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const u64 entry_mask = entries[position / 32];
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const size_t sub_index = position % 32;
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entries[position / 32] =
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(~(3ULL << sub_index * 2) & entry_mask) | (static_cast<u64>(entry) << sub_index * 2);
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}
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template <MemoryManager::EntryType entry_type>
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GPUVAddr MemoryManager::PageTableOp(GPUVAddr gpu_addr, [[maybe_unused]] VAddr cpu_addr,
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size_t size) {
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u64 remaining_size{size};
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if constexpr (entry_type == EntryType::Mapped) {
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page_table.ReserveRange(gpu_addr, size);
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}
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for (u64 offset{}; offset < size; offset += page_size) {
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if (remaining_size < page_size) {
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SetPageEntry(gpu_addr + offset, page_entry + offset, remaining_size);
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} else {
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SetPageEntry(gpu_addr + offset, page_entry + offset);
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const GPUVAddr current_gpu_addr = gpu_addr + offset;
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SetEntry(current_gpu_addr, entry_type);
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if constexpr (entry_type == EntryType::Mapped) {
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const VAddr current_cpu_addr = cpu_addr + offset;
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const auto index = PageEntryIndex(current_gpu_addr);
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page_table[index] = static_cast<u32>(current_cpu_addr >> 12ULL);
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}
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remaining_size -= page_size;
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}
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return gpu_addr;
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}
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void MemoryManager::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
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rasterizer = rasterizer_;
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}
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GPUVAddr MemoryManager::Map(VAddr cpu_addr, GPUVAddr gpu_addr, std::size_t size) {
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const auto it = std::ranges::lower_bound(map_ranges, gpu_addr, {}, &MapRange::first);
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if (it != map_ranges.end() && it->first == gpu_addr) {
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it->second = size;
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} else {
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map_ranges.insert(it, MapRange{gpu_addr, size});
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}
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return UpdateRange(gpu_addr, cpu_addr, size);
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return PageTableOp<EntryType::Mapped>(gpu_addr, cpu_addr, size);
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}
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GPUVAddr MemoryManager::MapAllocate(VAddr cpu_addr, std::size_t size, std::size_t align) {
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@ -62,13 +89,6 @@ void MemoryManager::Unmap(GPUVAddr gpu_addr, std::size_t size) {
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if (size == 0) {
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return;
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}
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const auto it = std::ranges::lower_bound(map_ranges, gpu_addr, {}, &MapRange::first);
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if (it != map_ranges.end()) {
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ASSERT(it->first == gpu_addr);
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map_ranges.erase(it);
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} else {
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ASSERT_MSG(false, "Unmapping non-existent GPU address=0x{:x}", gpu_addr);
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}
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const auto submapped_ranges = GetSubmappedRange(gpu_addr, size);
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for (const auto& [map_addr, map_size] : submapped_ranges) {
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@ -79,63 +99,23 @@ void MemoryManager::Unmap(GPUVAddr gpu_addr, std::size_t size) {
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rasterizer->UnmapMemory(*cpu_addr, map_size);
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}
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UpdateRange(gpu_addr, PageEntry::State::Unmapped, size);
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PageTableOp<EntryType::Free>(gpu_addr, 0, size);
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}
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std::optional<GPUVAddr> MemoryManager::AllocateFixed(GPUVAddr gpu_addr, std::size_t size) {
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for (u64 offset{}; offset < size; offset += page_size) {
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if (!GetPageEntry(gpu_addr + offset).IsUnmapped()) {
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if (GetEntry(gpu_addr + offset) != EntryType::Free) {
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return std::nullopt;
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}
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}
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return UpdateRange(gpu_addr, PageEntry::State::Allocated, size);
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return PageTableOp<EntryType::Reserved>(gpu_addr, 0, size);
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}
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GPUVAddr MemoryManager::Allocate(std::size_t size, std::size_t align) {
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return *AllocateFixed(*FindFreeRange(size, align), size);
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}
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void MemoryManager::TryLockPage(PageEntry page_entry, std::size_t size) {
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if (!page_entry.IsValid()) {
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return;
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}
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ASSERT(system.CurrentProcess()
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->PageTable()
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.LockForDeviceAddressSpace(page_entry.ToAddress(), size)
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.IsSuccess());
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}
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void MemoryManager::TryUnlockPage(PageEntry page_entry, std::size_t size) {
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if (!page_entry.IsValid()) {
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return;
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}
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ASSERT(system.CurrentProcess()
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->PageTable()
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.UnlockForDeviceAddressSpace(page_entry.ToAddress(), size)
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.IsSuccess());
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}
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PageEntry MemoryManager::GetPageEntry(GPUVAddr gpu_addr) const {
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return page_table[PageEntryIndex(gpu_addr)];
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}
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void MemoryManager::SetPageEntry(GPUVAddr gpu_addr, PageEntry page_entry, std::size_t size) {
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// TODO(bunnei): We should lock/unlock device regions. This currently causes issues due to
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// improper tracking, but should be fixed in the future.
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//// Unlock the old page
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// TryUnlockPage(page_table[PageEntryIndex(gpu_addr)], size);
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//// Lock the new page
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// TryLockPage(page_entry, size);
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auto& current_page = page_table[PageEntryIndex(gpu_addr)];
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current_page = page_entry;
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}
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std::optional<GPUVAddr> MemoryManager::FindFreeRange(std::size_t size, std::size_t align,
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bool start_32bit_address) const {
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if (!align) {
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@ -145,9 +125,9 @@ std::optional<GPUVAddr> MemoryManager::FindFreeRange(std::size_t size, std::size
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}
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u64 available_size{};
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GPUVAddr gpu_addr{start_32bit_address ? address_space_start_low : address_space_start};
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GPUVAddr gpu_addr{allocate_start};
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while (gpu_addr + available_size < address_space_size) {
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if (GetPageEntry(gpu_addr + available_size).IsUnmapped()) {
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if (GetEntry(gpu_addr + available_size) == EntryType::Free) {
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available_size += page_size;
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if (available_size >= size) {
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@ -168,15 +148,12 @@ std::optional<GPUVAddr> MemoryManager::FindFreeRange(std::size_t size, std::size
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}
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std::optional<VAddr> MemoryManager::GpuToCpuAddress(GPUVAddr gpu_addr) const {
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if (gpu_addr == 0) {
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return std::nullopt;
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}
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const auto page_entry{GetPageEntry(gpu_addr)};
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if (!page_entry.IsValid()) {
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if (GetEntry(gpu_addr) != EntryType::Mapped) {
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return std::nullopt;
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}
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return page_entry.ToAddress() + (gpu_addr & page_mask);
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const VAddr cpu_addr_base = static_cast<VAddr>(page_table[PageEntryIndex(gpu_addr)]) << 12ULL;
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return cpu_addr_base + (gpu_addr & page_mask);
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}
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std::optional<VAddr> MemoryManager::GpuToCpuAddress(GPUVAddr addr, std::size_t size) const {
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@ -227,10 +204,6 @@ template void MemoryManager::Write<u32>(GPUVAddr addr, u32 data);
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template void MemoryManager::Write<u64>(GPUVAddr addr, u64 data);
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u8* MemoryManager::GetPointer(GPUVAddr gpu_addr) {
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if (!GetPageEntry(gpu_addr).IsValid()) {
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return {};
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}
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const auto address{GpuToCpuAddress(gpu_addr)};
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if (!address) {
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return {};
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@ -240,10 +213,6 @@ u8* MemoryManager::GetPointer(GPUVAddr gpu_addr) {
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}
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const u8* MemoryManager::GetPointer(GPUVAddr gpu_addr) const {
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if (!GetPageEntry(gpu_addr).IsValid()) {
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return {};
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}
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const auto address{GpuToCpuAddress(gpu_addr)};
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if (!address) {
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return {};
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@ -252,12 +221,6 @@ const u8* MemoryManager::GetPointer(GPUVAddr gpu_addr) const {
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return system.Memory().GetPointer(*address);
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}
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size_t MemoryManager::BytesToMapEnd(GPUVAddr gpu_addr) const noexcept {
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auto it = std::ranges::upper_bound(map_ranges, gpu_addr, {}, &MapRange::first);
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--it;
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return it->second - (gpu_addr - it->first);
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}
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void MemoryManager::ReadBlockImpl(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size,
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bool is_safe) const {
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std::size_t remaining_size{size};
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@ -268,7 +231,7 @@ void MemoryManager::ReadBlockImpl(GPUVAddr gpu_src_addr, void* dest_buffer, std:
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const std::size_t copy_amount{
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std::min(static_cast<std::size_t>(page_size) - page_offset, remaining_size)};
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const auto page_addr{GpuToCpuAddress(page_index << page_bits)};
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if (page_addr && *page_addr != 0) {
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if (page_addr) {
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const auto src_addr{*page_addr + page_offset};
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if (is_safe) {
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// Flush must happen on the rasterizer interface, such that memory is always
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@ -307,7 +270,7 @@ void MemoryManager::WriteBlockImpl(GPUVAddr gpu_dest_addr, const void* src_buffe
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const std::size_t copy_amount{
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std::min(static_cast<std::size_t>(page_size) - page_offset, remaining_size)};
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const auto page_addr{GpuToCpuAddress(page_index << page_bits)};
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if (page_addr && *page_addr != 0) {
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if (page_addr) {
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const auto dest_addr{*page_addr + page_offset};
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if (is_safe) {
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@ -392,7 +355,7 @@ bool MemoryManager::IsFullyMappedRange(GPUVAddr gpu_addr, std::size_t size) cons
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size_t page_index{gpu_addr >> page_bits};
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const size_t page_last{(gpu_addr + size + page_size - 1) >> page_bits};
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while (page_index < page_last) {
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if (!page_table[page_index].IsValid() || page_table[page_index].ToAddress() == 0) {
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if (GetEntry(page_index << page_bits) == EntryType::Free) {
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return false;
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}
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++page_index;
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@ -408,7 +371,7 @@ std::vector<std::pair<GPUVAddr, std::size_t>> MemoryManager::GetSubmappedRange(
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size_t page_offset{gpu_addr & page_mask};
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std::optional<std::pair<GPUVAddr, std::size_t>> last_segment{};
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std::optional<VAddr> old_page_addr{};
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const auto extend_size = [&last_segment, &page_index, &page_offset](std::size_t bytes) {
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const auto extend_size = [this, &last_segment, &page_index, &page_offset](std::size_t bytes) {
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if (!last_segment) {
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const GPUVAddr new_base_addr = (page_index << page_bits) + page_offset;
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last_segment = {new_base_addr, bytes};
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@ -8,6 +8,7 @@
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#include <vector>
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#include "common/common_types.h"
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#include "common/multi_level_page_table.h"
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namespace VideoCore {
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class RasterizerInterface;
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@ -19,55 +20,10 @@ class System;
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namespace Tegra {
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class PageEntry final {
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public:
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enum class State : u32 {
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Unmapped = static_cast<u32>(-1),
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Allocated = static_cast<u32>(-2),
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};
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constexpr PageEntry() = default;
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constexpr PageEntry(State state_) : state{state_} {}
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constexpr PageEntry(VAddr addr) : state{static_cast<State>(addr >> ShiftBits)} {}
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[[nodiscard]] constexpr bool IsUnmapped() const {
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return state == State::Unmapped;
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}
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[[nodiscard]] constexpr bool IsAllocated() const {
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return state == State::Allocated;
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}
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[[nodiscard]] constexpr bool IsValid() const {
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return !IsUnmapped() && !IsAllocated();
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}
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[[nodiscard]] constexpr VAddr ToAddress() const {
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if (!IsValid()) {
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return {};
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}
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return static_cast<VAddr>(state) << ShiftBits;
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}
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[[nodiscard]] constexpr PageEntry operator+(u64 offset) const {
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// If this is a reserved value, offsets do not apply
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if (!IsValid()) {
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return *this;
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}
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return PageEntry{(static_cast<VAddr>(state) << ShiftBits) + offset};
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}
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private:
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static constexpr std::size_t ShiftBits{12};
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State state{State::Unmapped};
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};
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static_assert(sizeof(PageEntry) == 4, "PageEntry is too large");
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class MemoryManager final {
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public:
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explicit MemoryManager(Core::System& system_);
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explicit MemoryManager(Core::System& system_, u64 address_space_bits_ = 40,
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u64 page_bits_ = 16);
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~MemoryManager();
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/// Binds a renderer to the memory manager.
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@ -86,9 +42,6 @@ public:
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[[nodiscard]] u8* GetPointer(GPUVAddr addr);
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[[nodiscard]] const u8* GetPointer(GPUVAddr addr) const;
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/// Returns the number of bytes until the end of the memory map containing the given GPU address
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[[nodiscard]] size_t BytesToMapEnd(GPUVAddr gpu_addr) const noexcept;
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/**
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* ReadBlock and WriteBlock are full read and write operations over virtual
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* GPU Memory. It's important to use these when GPU memory may not be continuous
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@ -145,44 +98,47 @@ public:
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void FlushRegion(GPUVAddr gpu_addr, size_t size) const;
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private:
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[[nodiscard]] PageEntry GetPageEntry(GPUVAddr gpu_addr) const;
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void SetPageEntry(GPUVAddr gpu_addr, PageEntry page_entry, std::size_t size = page_size);
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GPUVAddr UpdateRange(GPUVAddr gpu_addr, PageEntry page_entry, std::size_t size);
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[[nodiscard]] std::optional<GPUVAddr> FindFreeRange(std::size_t size, std::size_t align,
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bool start_32bit_address = false) const;
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void TryLockPage(PageEntry page_entry, std::size_t size);
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void TryUnlockPage(PageEntry page_entry, std::size_t size);
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void ReadBlockImpl(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size,
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bool is_safe) const;
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void WriteBlockImpl(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size,
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bool is_safe);
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[[nodiscard]] static constexpr std::size_t PageEntryIndex(GPUVAddr gpu_addr) {
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[[nodiscard]] inline std::size_t PageEntryIndex(GPUVAddr gpu_addr) const {
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return (gpu_addr >> page_bits) & page_table_mask;
|
||||
}
|
||||
|
||||
static constexpr u64 address_space_size = 1ULL << 40;
|
||||
static constexpr u64 address_space_start = 1ULL << 32;
|
||||
static constexpr u64 address_space_start_low = 1ULL << 16;
|
||||
static constexpr u64 page_bits{16};
|
||||
static constexpr u64 page_size{1 << page_bits};
|
||||
static constexpr u64 page_mask{page_size - 1};
|
||||
static constexpr u64 page_table_bits{24};
|
||||
static constexpr u64 page_table_size{1 << page_table_bits};
|
||||
static constexpr u64 page_table_mask{page_table_size - 1};
|
||||
|
||||
Core::System& system;
|
||||
|
||||
const u64 address_space_bits;
|
||||
const u64 page_bits;
|
||||
u64 address_space_size;
|
||||
u64 allocate_start;
|
||||
u64 page_size;
|
||||
u64 page_mask;
|
||||
u64 page_table_mask;
|
||||
static constexpr u64 cpu_page_bits{12};
|
||||
|
||||
VideoCore::RasterizerInterface* rasterizer = nullptr;
|
||||
|
||||
std::vector<PageEntry> page_table;
|
||||
enum class EntryType : u64 {
|
||||
Free = 0,
|
||||
Reserved = 1,
|
||||
Mapped = 2,
|
||||
};
|
||||
|
||||
using MapRange = std::pair<GPUVAddr, size_t>;
|
||||
std::vector<MapRange> map_ranges;
|
||||
std::vector<u64> entries;
|
||||
|
||||
std::vector<std::pair<VAddr, std::size_t>> cache_invalidate_queue;
|
||||
template <EntryType entry_type>
|
||||
GPUVAddr PageTableOp(GPUVAddr gpu_addr, [[maybe_unused]] VAddr cpu_addr, size_t size);
|
||||
|
||||
EntryType GetEntry(size_t position) const;
|
||||
|
||||
void SetEntry(size_t position, EntryType entry);
|
||||
|
||||
Common::MultiLevelPageTable<u32> page_table;
|
||||
};
|
||||
|
||||
} // namespace Tegra
|
||||
|
|
|
|||
Reference in New Issue