GPU: Renamed ShaderType to ShaderStage as that is less confusing.
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88698c156f
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@ -44,23 +44,23 @@ void Maxwell3D::WriteReg(u32 method, u32 value) {
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break;
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break;
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}
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}
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case MAXWELL3D_REG_INDEX(cb_bind[0].raw_config): {
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case MAXWELL3D_REG_INDEX(cb_bind[0].raw_config): {
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ProcessCBBind(Regs::ShaderType::Vertex);
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ProcessCBBind(Regs::ShaderStage::Vertex);
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break;
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break;
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}
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}
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case MAXWELL3D_REG_INDEX(cb_bind[1].raw_config): {
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case MAXWELL3D_REG_INDEX(cb_bind[1].raw_config): {
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ProcessCBBind(Regs::ShaderType::TesselationControl);
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ProcessCBBind(Regs::ShaderStage::TesselationControl);
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break;
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break;
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}
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}
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case MAXWELL3D_REG_INDEX(cb_bind[2].raw_config): {
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case MAXWELL3D_REG_INDEX(cb_bind[2].raw_config): {
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ProcessCBBind(Regs::ShaderType::TesselationEval);
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ProcessCBBind(Regs::ShaderStage::TesselationEval);
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break;
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break;
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}
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}
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case MAXWELL3D_REG_INDEX(cb_bind[3].raw_config): {
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case MAXWELL3D_REG_INDEX(cb_bind[3].raw_config): {
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ProcessCBBind(Regs::ShaderType::Geometry);
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ProcessCBBind(Regs::ShaderStage::Geometry);
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break;
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break;
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}
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}
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case MAXWELL3D_REG_INDEX(cb_bind[4].raw_config): {
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case MAXWELL3D_REG_INDEX(cb_bind[4].raw_config): {
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ProcessCBBind(Regs::ShaderType::Fragment);
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ProcessCBBind(Regs::ShaderStage::Fragment);
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break;
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break;
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}
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}
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case MAXWELL3D_REG_INDEX(draw.vertex_end_gl): {
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case MAXWELL3D_REG_INDEX(draw.vertex_end_gl): {
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@ -106,18 +106,18 @@ void Maxwell3D::SetShader(const std::vector<u32>& parameters) {
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* [0] = Shader Program.
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* [0] = Shader Program.
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* [1] = Unknown, presumably the shader id.
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* [1] = Unknown, presumably the shader id.
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* [2] = Offset to the start of the shader, after the 0x30 bytes header.
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* [2] = Offset to the start of the shader, after the 0x30 bytes header.
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* [3] = Shader Type.
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* [3] = Shader Stage.
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* [4] = Const Buffer Address >> 8.
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* [4] = Const Buffer Address >> 8.
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*/
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*/
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auto shader_program = static_cast<Regs::ShaderProgram>(parameters[0]);
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auto shader_program = static_cast<Regs::ShaderProgram>(parameters[0]);
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// TODO(Subv): This address is probably an offset from the CODE_ADDRESS register.
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// TODO(Subv): This address is probably an offset from the CODE_ADDRESS register.
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GPUVAddr address = parameters[2];
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GPUVAddr address = parameters[2];
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auto shader_type = static_cast<Regs::ShaderType>(parameters[3]);
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auto shader_stage = static_cast<Regs::ShaderStage>(parameters[3]);
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GPUVAddr cb_address = parameters[4] << 8;
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GPUVAddr cb_address = parameters[4] << 8;
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auto& shader = state.shader_programs[static_cast<size_t>(shader_program)];
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auto& shader = state.shader_programs[static_cast<size_t>(shader_program)];
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shader.program = shader_program;
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shader.program = shader_program;
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shader.type = shader_type;
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shader.stage = shader_stage;
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shader.address = address;
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shader.address = address;
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// Perform the same operations as the real macro code.
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// Perform the same operations as the real macro code.
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@ -135,13 +135,13 @@ void Maxwell3D::SetShader(const std::vector<u32>& parameters) {
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// Write a hardcoded 0x11 to CB_BIND, this binds the current const buffer to buffer c1[] in the
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// Write a hardcoded 0x11 to CB_BIND, this binds the current const buffer to buffer c1[] in the
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// shader. It's likely that these are the constants for the shader.
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// shader. It's likely that these are the constants for the shader.
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regs.cb_bind[static_cast<size_t>(shader_type)].valid.Assign(1);
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regs.cb_bind[static_cast<size_t>(shader_stage)].valid.Assign(1);
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regs.cb_bind[static_cast<size_t>(shader_type)].index.Assign(1);
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regs.cb_bind[static_cast<size_t>(shader_stage)].index.Assign(1);
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ProcessCBBind(shader_type);
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ProcessCBBind(shader_stage);
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}
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}
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void Maxwell3D::ProcessCBBind(Regs::ShaderType stage) {
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void Maxwell3D::ProcessCBBind(Regs::ShaderStage stage) {
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// Bind the buffer currently in CB_ADDRESS to the specified index in the desired shader stage.
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// Bind the buffer currently in CB_ADDRESS to the specified index in the desired shader stage.
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auto& shader = state.shader_stages[static_cast<size_t>(stage)];
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auto& shader = state.shader_stages[static_cast<size_t>(stage)];
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auto& bind_data = regs.cb_bind[static_cast<size_t>(stage)];
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auto& bind_data = regs.cb_bind[static_cast<size_t>(stage)];
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@ -38,7 +38,7 @@ public:
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static constexpr size_t NumCBData = 16;
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static constexpr size_t NumCBData = 16;
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static constexpr size_t NumVertexArrays = 32;
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static constexpr size_t NumVertexArrays = 32;
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static constexpr size_t MaxShaderProgram = 6;
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static constexpr size_t MaxShaderProgram = 6;
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static constexpr size_t MaxShaderType = 5;
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static constexpr size_t MaxShaderStage = 5;
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// Maximum number of const buffers per shader stage.
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// Maximum number of const buffers per shader stage.
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static constexpr size_t MaxConstBuffers = 16;
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static constexpr size_t MaxConstBuffers = 16;
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@ -56,7 +56,7 @@ public:
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Fragment = 5,
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Fragment = 5,
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};
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};
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enum class ShaderType : u32 {
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enum class ShaderStage : u32 {
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Vertex = 0,
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Vertex = 0,
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TesselationControl = 1,
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TesselationControl = 1,
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TesselationEval = 2,
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TesselationEval = 2,
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@ -136,7 +136,7 @@ public:
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u32 start_id;
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u32 start_id;
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INSERT_PADDING_WORDS(1);
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INSERT_PADDING_WORDS(1);
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u32 gpr_alloc;
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u32 gpr_alloc;
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ShaderType type;
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ShaderStage type;
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INSERT_PADDING_WORDS(9);
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INSERT_PADDING_WORDS(9);
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} shader_config[MaxShaderProgram];
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} shader_config[MaxShaderProgram];
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@ -164,7 +164,7 @@ public:
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BitField<4, 5, u32> index;
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BitField<4, 5, u32> index;
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};
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};
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INSERT_PADDING_WORDS(7);
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INSERT_PADDING_WORDS(7);
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} cb_bind[MaxShaderType];
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} cb_bind[MaxShaderStage];
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INSERT_PADDING_WORDS(0x50A);
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INSERT_PADDING_WORDS(0x50A);
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};
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};
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@ -183,7 +183,7 @@ public:
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};
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};
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struct ShaderProgramInfo {
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struct ShaderProgramInfo {
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Regs::ShaderType type;
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Regs::ShaderStage stage;
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Regs::ShaderProgram program;
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Regs::ShaderProgram program;
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GPUVAddr address;
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GPUVAddr address;
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};
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};
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@ -192,7 +192,7 @@ public:
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std::array<ConstBufferInfo, Regs::MaxConstBuffers> const_buffers;
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std::array<ConstBufferInfo, Regs::MaxConstBuffers> const_buffers;
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};
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};
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std::array<ShaderStageInfo, Regs::MaxShaderType> shader_stages;
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std::array<ShaderStageInfo, Regs::MaxShaderStage> shader_stages;
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std::array<ShaderProgramInfo, Regs::MaxShaderProgram> shader_programs;
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std::array<ShaderProgramInfo, Regs::MaxShaderProgram> shader_programs;
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};
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};
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@ -205,7 +205,7 @@ private:
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void ProcessQueryGet();
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void ProcessQueryGet();
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/// Handles a write to the CB_BIND register.
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/// Handles a write to the CB_BIND register.
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void ProcessCBBind(Regs::ShaderType stage);
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void ProcessCBBind(Regs::ShaderStage stage);
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/// Handles a write to the VERTEX_END_GL register, triggering a draw.
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/// Handles a write to the VERTEX_END_GL register, triggering a draw.
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void DrawArrays();
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void DrawArrays();
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