ShaderGen: Register id 255 is special and is hardcoded to return 0 (SR_ZERO).
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@ -13,6 +13,9 @@ namespace Tegra {
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namespace Shader {
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struct Register {
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// Register 255 is special cased to always be 0
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static constexpr size_t ZeroIndex = 255;
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constexpr Register() = default;
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constexpr Register(u64 value) : value(value) {}
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@ -220,6 +220,8 @@ private:
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/// Generates code representing a temporary (GPR) register.
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std::string GetRegister(const Register& reg, unsigned elem = 0) {
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if (reg == Register::ZeroIndex)
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return "0";
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if (stage == Maxwell3D::Regs::ShaderStage::Fragment && reg < 4) {
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// GPRs 0-3 are output color for the fragment shader
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return std::string{"color."} + "rgba"[(reg + elem) & 3];
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