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ShaderGen: Register id 255 is special and is hardcoded to return 0 (SR_ZERO).

This commit is contained in:
Subv 2018-04-20 09:04:54 -05:00
parent 2e0a9f66a0
commit d03fc77475
2 changed files with 5 additions and 0 deletions
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3
src/video_core/engines/shader_bytecode.h
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@ -13,6 +13,9 @@ namespace Tegra {
namespace Shader { namespace Shader {
struct Register { struct Register {
// Register 255 is special cased to always be 0
static constexpr size_t ZeroIndex = 255;
constexpr Register() = default; constexpr Register() = default;
constexpr Register(u64 value) : value(value) {} constexpr Register(u64 value) : value(value) {}

2
src/video_core/renderer_opengl/gl_shader_decompiler.cpp
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@ -220,6 +220,8 @@ private:
/// Generates code representing a temporary (GPR) register. /// Generates code representing a temporary (GPR) register.
std::string GetRegister(const Register& reg, unsigned elem = 0) { std::string GetRegister(const Register& reg, unsigned elem = 0) {
if (reg == Register::ZeroIndex)
return "0";
if (stage == Maxwell3D::Regs::ShaderStage::Fragment && reg < 4) { if (stage == Maxwell3D::Regs::ShaderStage::Fragment && reg < 4) {
// GPRs 0-3 are output color for the fragment shader // GPRs 0-3 are output color for the fragment shader
return std::string{"color."} + "rgba"[(reg + elem) & 3]; return std::string{"color."} + "rgba"[(reg + elem) & 3];