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Merge pull request #734 from yuriks/memmap

Small memory map definitions cleanup
This commit is contained in:
Tony Wasserka 2015-05-09 15:57:29 +02:00
commit e35e72d0a5
16 changed files with 185 additions and 182 deletions

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@ -159,7 +159,7 @@ void TextureInfoDockWidget::OnStrideChanged(int value) {
} }
QPixmap TextureInfoDockWidget::ReloadPixmap() const { QPixmap TextureInfoDockWidget::ReloadPixmap() const {
u8* src = Memory::GetPointer(Pica::PAddrToVAddr(info.physical_address)); u8* src = Memory::GetPhysicalPointer(info.physical_address);
return QPixmap::fromImage(LoadTexture(src, info)); return QPixmap::fromImage(LoadTexture(src, info));
} }
@ -274,7 +274,7 @@ void GPUCommandListWidget::SetCommandInfo(const QModelIndex& index) {
auto format = Pica::registers.GetTextures()[index].format; auto format = Pica::registers.GetTextures()[index].format;
auto info = Pica::DebugUtils::TextureInfo::FromPicaRegister(config, format); auto info = Pica::DebugUtils::TextureInfo::FromPicaRegister(config, format);
u8* src = Memory::GetPointer(Pica::PAddrToVAddr(config.GetPhysicalAddress())); u8* src = Memory::GetPhysicalPointer(config.GetPhysicalAddress());
new_info_widget = new TextureInfoWidget(src, info); new_info_widget = new TextureInfoWidget(src, info);
} else { } else {
new_info_widget = new QWidget; new_info_widget = new QWidget;

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@ -215,7 +215,7 @@ void GraphicsFramebufferWidget::OnUpdate()
u32 bytes_per_pixel = GraphicsFramebufferWidget::BytesPerPixel(framebuffer_format); u32 bytes_per_pixel = GraphicsFramebufferWidget::BytesPerPixel(framebuffer_format);
QImage decoded_image(framebuffer_width, framebuffer_height, QImage::Format_ARGB32); QImage decoded_image(framebuffer_width, framebuffer_height, QImage::Format_ARGB32);
u8* buffer = Memory::GetPointer(Pica::PAddrToVAddr(framebuffer_address)); u8* buffer = Memory::GetPhysicalPointer(framebuffer_address);
for (unsigned int y = 0; y < framebuffer_height; ++y) { for (unsigned int y = 0; y < framebuffer_height; ++y) {
for (unsigned int x = 0; x < framebuffer_width; ++x) { for (unsigned int x = 0; x < framebuffer_width; ++x) {

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@ -63,7 +63,7 @@ int Init() {
// TODO: Whenever TLS is implemented, this should contain // TODO: Whenever TLS is implemented, this should contain
// the address of the 0x200-byte TLS // the address of the 0x200-byte TLS
g_app_core->SetCP15Register(CP15_THREAD_URO, Memory::KERNEL_MEMORY_VADDR); g_app_core->SetCP15Register(CP15_THREAD_URO, Memory::TLS_AREA_VADDR);
LOG_DEBUG(Core, "Initialized OK"); LOG_DEBUG(Core, "Initialized OK");
return 0; return 0;

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@ -17,7 +17,7 @@ static const int kCommandHeaderOffset = 0x80; ///< Offset into command buffer of
* @return Pointer to command buffer * @return Pointer to command buffer
*/ */
inline static u32* GetCommandBuffer(const int offset=0) { inline static u32* GetCommandBuffer(const int offset=0) {
return (u32*)Memory::GetPointer(Memory::KERNEL_MEMORY_VADDR + kCommandHeaderOffset + offset); return (u32*)Memory::GetPointer(Memory::TLS_AREA_VADDR + kCommandHeaderOffset + offset);
} }
/** /**

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@ -443,7 +443,8 @@ void Thread::BoostPriority(s32 priority) {
SharedPtr<Thread> SetupIdleThread() { SharedPtr<Thread> SetupIdleThread() {
// We need to pass a few valid values to get around parameter checking in Thread::Create. // We need to pass a few valid values to get around parameter checking in Thread::Create.
auto thread = Thread::Create("idle", Memory::KERNEL_MEMORY_VADDR, THREADPRIO_LOWEST, 0, // TODO(yuriks): Figure out a way to avoid passing the bogus VAddr parameter
auto thread = Thread::Create("idle", Memory::TLS_AREA_VADDR, THREADPRIO_LOWEST, 0,
THREADPROCESSORID_0, 0).MoveFrom(); THREADPROCESSORID_0, 0).MoveFrom();
thread->idle = true; thread->idle = true;
@ -455,7 +456,7 @@ SharedPtr<Thread> SetupMainThread(u32 stack_size, u32 entry_point, s32 priority)
// Initialize new "main" thread // Initialize new "main" thread
auto thread_res = Thread::Create("main", entry_point, priority, 0, auto thread_res = Thread::Create("main", entry_point, priority, 0,
THREADPROCESSORID_0, Memory::SCRATCHPAD_VADDR_END); THREADPROCESSORID_0, Memory::HEAP_VADDR_END - stack_size);
SharedPtr<Thread> thread = thread_res.MoveFrom(); SharedPtr<Thread> thread = thread_res.MoveFrom();

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@ -42,7 +42,7 @@ static void ConvertProcessAddressFromDspDram(Service::Interface* self) {
u32 addr = cmd_buff[1]; u32 addr = cmd_buff[1];
cmd_buff[1] = 0; // No error cmd_buff[1] = 0; // No error
cmd_buff[2] = (addr << 1) + (Memory::DSP_MEMORY_VADDR + 0x40000); cmd_buff[2] = (addr << 1) + (Memory::DSP_RAM_VADDR + 0x40000);
LOG_WARNING(Service_DSP, "(STUBBED) called with address 0x%08X", addr); LOG_WARNING(Service_DSP, "(STUBBED) called with address 0x%08X", addr);
} }

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@ -76,8 +76,8 @@ inline void Write(u32 addr, const T data) {
auto& config = g_regs.memory_fill_config[is_second_filler]; auto& config = g_regs.memory_fill_config[is_second_filler];
if (config.address_start && config.trigger) { if (config.address_start && config.trigger) {
u8* start = Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetStartAddress())); u8* start = Memory::GetPhysicalPointer(config.GetStartAddress());
u8* end = Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetEndAddress())); u8* end = Memory::GetPhysicalPointer(config.GetEndAddress());
if (config.fill_24bit) { if (config.fill_24bit) {
// fill with 24-bit values // fill with 24-bit values
@ -114,8 +114,8 @@ inline void Write(u32 addr, const T data) {
{ {
const auto& config = g_regs.display_transfer_config; const auto& config = g_regs.display_transfer_config;
if (config.trigger & 1) { if (config.trigger & 1) {
u8* src_pointer = Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalInputAddress())); u8* src_pointer = Memory::GetPhysicalPointer(config.GetPhysicalInputAddress());
u8* dst_pointer = Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalOutputAddress())); u8* dst_pointer = Memory::GetPhysicalPointer(config.GetPhysicalOutputAddress());
if (config.scaling > config.ScaleXY) { if (config.scaling > config.ScaleXY) {
LOG_CRITICAL(HW_GPU, "Unimplemented display transfer scaling mode %u", config.scaling.Value()); LOG_CRITICAL(HW_GPU, "Unimplemented display transfer scaling mode %u", config.scaling.Value());
@ -257,7 +257,7 @@ inline void Write(u32 addr, const T data) {
const auto& config = g_regs.command_processor_config; const auto& config = g_regs.command_processor_config;
if (config.trigger & 1) if (config.trigger & 1)
{ {
u32* buffer = (u32*)Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalAddress())); u32* buffer = (u32*)Memory::GetPhysicalPointer(config.GetPhysicalAddress());
Pica::CommandProcessor::ProcessCommandList(buffer, config.size); Pica::CommandProcessor::ProcessCommandList(buffer, config.size);
} }
break; break;

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@ -234,9 +234,9 @@ ResultStatus AppLoader_THREEDSX::Load() {
Kernel::g_current_process->svc_access_mask.set(); Kernel::g_current_process->svc_access_mask.set();
Kernel::g_current_process->address_mappings = default_address_mappings; Kernel::g_current_process->address_mappings = default_address_mappings;
Load3DSXFile(*file, Memory::EXEFS_CODE_VADDR); Load3DSXFile(*file, Memory::PROCESS_IMAGE_VADDR);
Kernel::g_current_process->Run(Memory::EXEFS_CODE_VADDR, 48, Kernel::DEFAULT_STACK_SIZE); Kernel::g_current_process->Run(Memory::PROCESS_IMAGE_VADDR, 48, Kernel::DEFAULT_STACK_SIZE);
is_loaded = true; is_loaded = true;
return ResultStatus::Success; return ResultStatus::Success;

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@ -355,7 +355,7 @@ ResultStatus AppLoader_ELF::Load() {
Kernel::g_current_process->address_mappings = default_address_mappings; Kernel::g_current_process->address_mappings = default_address_mappings;
ElfReader elf_reader(&buffer[0]); ElfReader elf_reader(&buffer[0]);
elf_reader.LoadInto(Memory::EXEFS_CODE_VADDR); elf_reader.LoadInto(Memory::PROCESS_IMAGE_VADDR);
// TODO: Fill application title // TODO: Fill application title
Kernel::g_current_process->Run(elf_reader.GetEntryPoint(), 48, Kernel::DEFAULT_STACK_SIZE); Kernel::g_current_process->Run(elf_reader.GetEntryPoint(), 48, Kernel::DEFAULT_STACK_SIZE);

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@ -12,13 +12,12 @@
namespace Memory { namespace Memory {
u8* g_exefs_code; ///< ExeFS:/.code is loaded here u8* g_exefs_code; ///< ExeFS:/.code is loaded here
u8* g_system_mem; ///< System memory
u8* g_heap; ///< Application heap (main memory) u8* g_heap; ///< Application heap (main memory)
u8* g_shared_mem; ///< Shared memory
u8* g_heap_linear; ///< Linear heap u8* g_heap_linear; ///< Linear heap
u8* g_vram; ///< Video memory (VRAM) pointer u8* g_vram; ///< Video memory (VRAM) pointer
u8* g_shared_mem; ///< Shared memory
u8* g_dsp_mem; ///< DSP memory u8* g_dsp_mem; ///< DSP memory
u8* g_kernel_mem; ///< Kernel memory u8* g_tls_mem; ///< TLS memory
namespace { namespace {
@ -29,14 +28,13 @@ struct MemoryArea {
// We don't declare the IO regions in here since its handled by other means. // We don't declare the IO regions in here since its handled by other means.
static MemoryArea memory_areas[] = { static MemoryArea memory_areas[] = {
{&g_exefs_code, EXEFS_CODE_SIZE }, {&g_exefs_code, PROCESS_IMAGE_MAX_SIZE},
{&g_vram, VRAM_SIZE }, {&g_heap, HEAP_SIZE },
{&g_heap, HEAP_SIZE }, {&g_shared_mem, SHARED_MEMORY_SIZE },
{&g_shared_mem, SHARED_MEMORY_SIZE}, {&g_heap_linear, LINEAR_HEAP_SIZE },
{&g_system_mem, SYSTEM_MEMORY_SIZE}, {&g_vram, VRAM_SIZE },
{&g_dsp_mem, DSP_MEMORY_SIZE }, {&g_dsp_mem, DSP_RAM_SIZE },
{&g_kernel_mem, KERNEL_MEMORY_SIZE}, {&g_tls_mem, TLS_AREA_SIZE },
{&g_heap_linear, HEAP_LINEAR_SIZE },
}; };
} }

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@ -12,79 +12,93 @@ namespace Memory {
const u32 PAGE_SIZE = 0x1000; const u32 PAGE_SIZE = 0x1000;
enum : u32 { /// Physical memory regions as seen from the ARM11
BOOTROM_SIZE = 0x00010000, ///< Bootrom (super secret code/data @ 0x8000) size enum : PAddr {
BOOTROM_PADDR = 0x00000000, ///< Bootrom physical address /// IO register area
BOOTROM_PADDR_END = (BOOTROM_PADDR + BOOTROM_SIZE), IO_AREA_PADDR = 0x10100000,
IO_AREA_SIZE = 0x01000000, ///< IO area size (16MB)
IO_AREA_PADDR_END = IO_AREA_PADDR + IO_AREA_SIZE,
BOOTROM_MIRROR_SIZE = 0x00010000, ///< Bootrom Mirror size /// MPCore internal memory region
BOOTROM_MIRROR_PADDR = 0x00010000, ///< Bootrom Mirror physical address MPCORE_RAM_PADDR = 0x17E00000,
BOOTROM_MIRROR_PADDR_END = (BOOTROM_MIRROR_PADDR + BOOTROM_MIRROR_SIZE), MPCORE_RAM_SIZE = 0x00002000, ///< MPCore internal memory size (8KB)
MPCORE_RAM_PADDR_END = MPCORE_RAM_PADDR + MPCORE_RAM_SIZE,
MPCORE_PRIV_SIZE = 0x00002000, ///< MPCore private memory region size
MPCORE_PRIV_PADDR = 0x17E00000, ///< MPCore private memory region physical address
MPCORE_PRIV_PADDR_END = (MPCORE_PRIV_PADDR + MPCORE_PRIV_SIZE),
FCRAM_SIZE = 0x08000000, ///< FCRAM size /// Video memory
FCRAM_PADDR = 0x20000000, ///< FCRAM physical address VRAM_PADDR = 0x18000000,
FCRAM_PADDR_END = (FCRAM_PADDR + FCRAM_SIZE), VRAM_SIZE = 0x00600000, ///< VRAM size (6MB)
VRAM_PADDR_END = VRAM_PADDR + VRAM_SIZE,
HEAP_SIZE = FCRAM_SIZE, ///< Application heap size /// DSP memory
HEAP_VADDR = 0x08000000, DSP_RAM_PADDR = 0x1FF00000,
HEAP_VADDR_END = (HEAP_VADDR + HEAP_SIZE), DSP_RAM_SIZE = 0x00080000, ///< DSP memory size (512KB)
DSP_RAM_PADDR_END = DSP_RAM_PADDR + DSP_RAM_SIZE,
HEAP_LINEAR_SIZE = FCRAM_SIZE, /// AXI WRAM
HEAP_LINEAR_VADDR = 0x14000000, AXI_WRAM_PADDR = 0x1FF80000,
HEAP_LINEAR_VADDR_END = (HEAP_LINEAR_VADDR + HEAP_LINEAR_SIZE), AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size (512KB)
AXI_WRAM_PADDR_END = AXI_WRAM_PADDR + AXI_WRAM_SIZE,
AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size
AXI_WRAM_PADDR = 0x1FF80000, ///< AXI WRAM physical address
AXI_WRAM_PADDR_END = (AXI_WRAM_PADDR + AXI_WRAM_SIZE),
SHARED_MEMORY_SIZE = 0x04000000, ///< Shared memory size /// Main FCRAM
SHARED_MEMORY_VADDR = 0x10000000, ///< Shared memory FCRAM_PADDR = 0x20000000,
SHARED_MEMORY_VADDR_END = (SHARED_MEMORY_VADDR + SHARED_MEMORY_SIZE), FCRAM_SIZE = 0x08000000, ///< FCRAM size (128MB)
FCRAM_PADDR_END = FCRAM_PADDR + FCRAM_SIZE,
};
DSP_MEMORY_SIZE = 0x00080000, ///< DSP memory size /// Virtual user-space memory regions
DSP_MEMORY_VADDR = 0x1FF00000, ///< DSP memory virtual address enum : VAddr {
DSP_MEMORY_VADDR_END = (DSP_MEMORY_VADDR + DSP_MEMORY_SIZE), /// Where the application text, data and bss reside.
PROCESS_IMAGE_VADDR = 0x00100000,
PROCESS_IMAGE_MAX_SIZE = 0x03F00000,
PROCESS_IMAGE_VADDR_END = PROCESS_IMAGE_VADDR + PROCESS_IMAGE_MAX_SIZE,
CONFIG_MEMORY_SIZE = 0x00001000, ///< Configuration memory size /// Area where IPC buffers are mapped onto.
CONFIG_MEMORY_VADDR = 0x1FF80000, ///< Configuration memory virtual address IPC_MAPPING_VADDR = 0x04000000,
CONFIG_MEMORY_VADDR_END = (CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE), IPC_MAPPING_SIZE = 0x04000000,
IPC_MAPPING_VADDR_END = IPC_MAPPING_VADDR + IPC_MAPPING_SIZE,
SHARED_PAGE_SIZE = 0x00001000, ///< Shared page size /// Application heap (includes stack).
SHARED_PAGE_VADDR = 0x1FF81000, ///< Shared page virtual address HEAP_VADDR = 0x08000000,
SHARED_PAGE_VADDR_END = (SHARED_PAGE_VADDR + SHARED_PAGE_SIZE), HEAP_SIZE = 0x08000000,
HEAP_VADDR_END = HEAP_VADDR + HEAP_SIZE,
KERNEL_MEMORY_SIZE = 0x00001000, ///< Kernel memory size /// Area where shared memory buffers are mapped onto.
KERNEL_MEMORY_VADDR = 0xFFFF0000, ///< Kernel memory where the kthread objects etc are SHARED_MEMORY_VADDR = 0x10000000,
KERNEL_MEMORY_VADDR_END = (KERNEL_MEMORY_VADDR + KERNEL_MEMORY_SIZE), SHARED_MEMORY_SIZE = 0x04000000,
SHARED_MEMORY_VADDR_END = SHARED_MEMORY_VADDR + SHARED_MEMORY_SIZE,
EXEFS_CODE_SIZE = 0x03F00000, /// Maps 1:1 to an offset in FCRAM. Used for HW allocations that need to be linear in physical memory.
EXEFS_CODE_VADDR = 0x00100000, ///< ExeFS:/.code is loaded here LINEAR_HEAP_VADDR = 0x14000000,
EXEFS_CODE_VADDR_END = (EXEFS_CODE_VADDR + EXEFS_CODE_SIZE), LINEAR_HEAP_SIZE = 0x08000000,
LINEAR_HEAP_VADDR_END = LINEAR_HEAP_VADDR + LINEAR_HEAP_SIZE,
// Region of FCRAM used by system /// Maps 1:1 to the IO register area.
SYSTEM_MEMORY_SIZE = 0x02C00000, ///< 44MB IO_AREA_VADDR = 0x1EC00000,
SYSTEM_MEMORY_VADDR = 0x04000000, IO_AREA_VADDR_END = IO_AREA_VADDR + IO_AREA_SIZE,
SYSTEM_MEMORY_VADDR_END = (SYSTEM_MEMORY_VADDR + SYSTEM_MEMORY_SIZE),
HARDWARE_IO_SIZE = 0x01000000, /// Maps 1:1 to VRAM.
HARDWARE_IO_PADDR = 0x10000000, ///< IO physical address start VRAM_VADDR = 0x1F000000,
HARDWARE_IO_VADDR = 0x1EC00000, ///< IO virtual address start VRAM_VADDR_END = VRAM_VADDR + VRAM_SIZE,
HARDWARE_IO_PADDR_END = (HARDWARE_IO_PADDR + HARDWARE_IO_SIZE),
HARDWARE_IO_VADDR_END = (HARDWARE_IO_VADDR + HARDWARE_IO_SIZE),
VRAM_SIZE = 0x00600000, /// Maps 1:1 to DSP memory.
VRAM_PADDR = 0x18000000, DSP_RAM_VADDR = 0x1FF00000,
VRAM_VADDR = 0x1F000000, DSP_RAM_VADDR_END = DSP_RAM_VADDR + DSP_RAM_SIZE,
VRAM_PADDR_END = (VRAM_PADDR + VRAM_SIZE),
VRAM_VADDR_END = (VRAM_VADDR + VRAM_SIZE),
SCRATCHPAD_SIZE = 0x00004000, ///< Typical stack size - TODO: Read from exheader /// Read-only page containing kernel and system configuration values.
SCRATCHPAD_VADDR_END = 0x10000000, CONFIG_MEMORY_VADDR = 0x1FF80000,
SCRATCHPAD_VADDR = (SCRATCHPAD_VADDR_END - SCRATCHPAD_SIZE), ///< Stack space CONFIG_MEMORY_SIZE = 0x00001000,
CONFIG_MEMORY_VADDR_END = CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE,
/// Usually read-only page containing mostly values read from hardware.
SHARED_PAGE_VADDR = 0x1FF81000,
SHARED_PAGE_SIZE = 0x00001000,
SHARED_PAGE_VADDR_END = SHARED_PAGE_VADDR + SHARED_PAGE_SIZE,
// TODO(yuriks): The exact location and size of this area is uncomfirmed.
/// Area where TLS (Thread-Local Storage) buffers are allocated.
TLS_AREA_VADDR = 0x1FFA0000,
TLS_AREA_SIZE = 0x00002000, // Each TLS buffer is 0x200 bytes, allows for 16 threads
TLS_AREA_VADDR_END = TLS_AREA_VADDR + TLS_AREA_SIZE,
}; };
//////////////////////////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////////////////////////
@ -107,14 +121,13 @@ struct MemoryBlock {
//////////////////////////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////////////////////////
extern u8* g_heap_linear; ///< Linear heap (main memory) extern u8* g_exefs_code; ///< ExeFS:/.code is loaded here
extern u8* g_heap; ///< Application heap (main memory) extern u8* g_heap; ///< Application heap (main memory)
extern u8* g_vram; ///< Video memory (VRAM) extern u8* g_shared_mem; ///< Shared memory
extern u8* g_shared_mem; ///< Shared memory extern u8* g_heap_linear; ///< Linear heap (main memory)
extern u8* g_kernel_mem; ///< Kernel memory extern u8* g_vram; ///< Video memory (VRAM)
extern u8* g_dsp_mem; ///< DSP memory extern u8* g_dsp_mem; ///< DSP memory
extern u8* g_system_mem; ///< System memory extern u8* g_tls_mem; ///< TLS memory
extern u8* g_exefs_code; ///< ExeFS:/.code is loaded here
void Init(); void Init();
void Shutdown(); void Shutdown();
@ -168,10 +181,24 @@ inline const char* GetCharPointer(const VAddr address) {
return (const char *)GetPointer(address); return (const char *)GetPointer(address);
} }
/// Converts a physical address to virtual address /**
VAddr PhysicalToVirtualAddress(PAddr addr); * Converts a virtual address inside a region with 1:1 mapping to physical memory to a physical
* address. This should be used by services to translate addresses for use by the hardware.
/// Converts a virtual address to physical address */
PAddr VirtualToPhysicalAddress(VAddr addr); PAddr VirtualToPhysicalAddress(VAddr addr);
/**
* Undoes a mapping performed by VirtualToPhysicalAddress().
*/
VAddr PhysicalToVirtualAddress(PAddr addr);
/**
* Gets a pointer to the memory region beginning at the specified physical address.
*
* @note This is currently implemented using PhysicalToVirtualAddress().
*/
inline u8* GetPhysicalPointer(PAddr address) {
return GetPointer(PhysicalToVirtualAddress(address));
}
} // namespace } // namespace

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@ -18,40 +18,40 @@ namespace Memory {
static std::map<u32, MemoryBlock> heap_map; static std::map<u32, MemoryBlock> heap_map;
static std::map<u32, MemoryBlock> heap_linear_map; static std::map<u32, MemoryBlock> heap_linear_map;
/// Convert a physical address to virtual address
VAddr PhysicalToVirtualAddress(const PAddr addr) {
// Our memory interface read/write functions assume virtual addresses. Put any physical address
// to virtual address translations here. This is quite hacky, but necessary until we implement
// proper MMU emulation.
// TODO: Screw it, I'll let bunnei figure out how to do this properly.
if (addr == 0) {
return 0;
} else if ((addr >= VRAM_PADDR) && (addr < VRAM_PADDR_END)) {
return addr - VRAM_PADDR + VRAM_VADDR;
} else if ((addr >= FCRAM_PADDR) && (addr < FCRAM_PADDR_END)) {
return addr - FCRAM_PADDR + HEAP_LINEAR_VADDR;
}
LOG_ERROR(HW_Memory, "Unknown physical address @ 0x%08x", addr);
return addr;
}
/// Convert a physical address to virtual address
PAddr VirtualToPhysicalAddress(const VAddr addr) { PAddr VirtualToPhysicalAddress(const VAddr addr) {
// Our memory interface read/write functions assume virtual addresses. Put any physical address
// to virtual address translations here. This is quite hacky, but necessary until we implement
// proper MMU emulation.
// TODO: Screw it, I'll let bunnei figure out how to do this properly.
if (addr == 0) { if (addr == 0) {
return 0; return 0;
} else if ((addr >= VRAM_VADDR) && (addr < VRAM_VADDR_END)) { } else if (addr >= VRAM_VADDR && addr < VRAM_VADDR_END) {
return addr - VRAM_VADDR + VRAM_PADDR; return addr - VRAM_VADDR + VRAM_PADDR;
} else if ((addr >= HEAP_LINEAR_VADDR) && (addr < HEAP_LINEAR_VADDR_END)) { } else if (addr >= LINEAR_HEAP_VADDR && addr < LINEAR_HEAP_VADDR_END) {
return addr - HEAP_LINEAR_VADDR + FCRAM_PADDR; return addr - LINEAR_HEAP_VADDR + FCRAM_PADDR;
} else if (addr >= DSP_RAM_VADDR && addr < DSP_RAM_VADDR_END) {
return addr - DSP_RAM_VADDR + DSP_RAM_PADDR;
} else if (addr >= IO_AREA_VADDR && addr < IO_AREA_VADDR_END) {
return addr - IO_AREA_VADDR + IO_AREA_PADDR;
} }
LOG_ERROR(HW_Memory, "Unknown virtual address @ 0x%08x", addr); LOG_ERROR(HW_Memory, "Unknown virtual address @ 0x%08x", addr);
return addr; // To help with debugging, set bit on address so that it's obviously invalid.
return addr | 0x80000000;
}
VAddr PhysicalToVirtualAddress(const PAddr addr) {
if (addr == 0) {
return 0;
} else if (addr >= VRAM_PADDR && addr < VRAM_PADDR_END) {
return addr - VRAM_PADDR + VRAM_VADDR;
} else if (addr >= FCRAM_PADDR && addr < FCRAM_PADDR_END) {
return addr - FCRAM_PADDR + LINEAR_HEAP_VADDR;
} else if (addr >= DSP_RAM_PADDR && addr < DSP_RAM_PADDR_END) {
return addr - DSP_RAM_PADDR + DSP_RAM_VADDR;
} else if (addr >= IO_AREA_PADDR && addr < IO_AREA_PADDR_END) {
return addr - IO_AREA_PADDR + IO_AREA_VADDR;
}
LOG_ERROR(HW_Memory, "Unknown physical address @ 0x%08x", addr);
// To help with debugging, set bit on address so that it's obviously invalid.
return addr | 0x80000000;
} }
template <typename T> template <typename T>
@ -61,16 +61,16 @@ inline void Read(T &var, const VAddr vaddr) {
// Could just do a base-relative read, too.... TODO // Could just do a base-relative read, too.... TODO
// Kernel memory command buffer // Kernel memory command buffer
if (vaddr >= KERNEL_MEMORY_VADDR && vaddr < KERNEL_MEMORY_VADDR_END) { if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
var = *((const T*)&g_kernel_mem[vaddr - KERNEL_MEMORY_VADDR]); var = *((const T*)&g_tls_mem[vaddr - TLS_AREA_VADDR]);
// ExeFS:/.code is loaded here // ExeFS:/.code is loaded here
} else if ((vaddr >= EXEFS_CODE_VADDR) && (vaddr < EXEFS_CODE_VADDR_END)) { } else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
var = *((const T*)&g_exefs_code[vaddr - EXEFS_CODE_VADDR]); var = *((const T*)&g_exefs_code[vaddr - PROCESS_IMAGE_VADDR]);
// FCRAM - linear heap // FCRAM - linear heap
} else if ((vaddr >= HEAP_LINEAR_VADDR) && (vaddr < HEAP_LINEAR_VADDR_END)) { } else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
var = *((const T*)&g_heap_linear[vaddr - HEAP_LINEAR_VADDR]); var = *((const T*)&g_heap_linear[vaddr - LINEAR_HEAP_VADDR]);
// FCRAM - application heap // FCRAM - application heap
} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) { } else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
@ -80,10 +80,6 @@ inline void Read(T &var, const VAddr vaddr) {
} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) { } else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
var = *((const T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR]); var = *((const T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR]);
// System memory
} else if ((vaddr >= SYSTEM_MEMORY_VADDR) && (vaddr < SYSTEM_MEMORY_VADDR_END)) {
var = *((const T*)&g_system_mem[vaddr - SYSTEM_MEMORY_VADDR]);
// Config memory // Config memory
} else if ((vaddr >= CONFIG_MEMORY_VADDR) && (vaddr < CONFIG_MEMORY_VADDR_END)) { } else if ((vaddr >= CONFIG_MEMORY_VADDR) && (vaddr < CONFIG_MEMORY_VADDR_END)) {
ConfigMem::Read<T>(var, vaddr); ConfigMem::Read<T>(var, vaddr);
@ -93,8 +89,8 @@ inline void Read(T &var, const VAddr vaddr) {
SharedPage::Read<T>(var, vaddr); SharedPage::Read<T>(var, vaddr);
// DSP memory // DSP memory
} else if ((vaddr >= DSP_MEMORY_VADDR) && (vaddr < DSP_MEMORY_VADDR_END)) { } else if ((vaddr >= DSP_RAM_VADDR) && (vaddr < DSP_RAM_VADDR_END)) {
var = *((const T*)&g_dsp_mem[vaddr - DSP_MEMORY_VADDR]); var = *((const T*)&g_dsp_mem[vaddr - DSP_RAM_VADDR]);
// VRAM // VRAM
} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) { } else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
@ -109,16 +105,16 @@ template <typename T>
inline void Write(const VAddr vaddr, const T data) { inline void Write(const VAddr vaddr, const T data) {
// Kernel memory command buffer // Kernel memory command buffer
if (vaddr >= KERNEL_MEMORY_VADDR && vaddr < KERNEL_MEMORY_VADDR_END) { if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
*(T*)&g_kernel_mem[vaddr - KERNEL_MEMORY_VADDR] = data; *(T*)&g_tls_mem[vaddr - TLS_AREA_VADDR] = data;
// ExeFS:/.code is loaded here // ExeFS:/.code is loaded here
} else if ((vaddr >= EXEFS_CODE_VADDR) && (vaddr < EXEFS_CODE_VADDR_END)) { } else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
*(T*)&g_exefs_code[vaddr - EXEFS_CODE_VADDR] = data; *(T*)&g_exefs_code[vaddr - PROCESS_IMAGE_VADDR] = data;
// FCRAM - linear heap // FCRAM - linear heap
} else if ((vaddr >= HEAP_LINEAR_VADDR) && (vaddr < HEAP_LINEAR_VADDR_END)) { } else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
*(T*)&g_heap_linear[vaddr - HEAP_LINEAR_VADDR] = data; *(T*)&g_heap_linear[vaddr - LINEAR_HEAP_VADDR] = data;
// FCRAM - application heap // FCRAM - application heap
} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) { } else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
@ -128,17 +124,13 @@ inline void Write(const VAddr vaddr, const T data) {
} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) { } else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
*(T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR] = data; *(T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR] = data;
// System memory
} else if ((vaddr >= SYSTEM_MEMORY_VADDR) && (vaddr < SYSTEM_MEMORY_VADDR_END)) {
*(T*)&g_system_mem[vaddr - SYSTEM_MEMORY_VADDR] = data;
// VRAM // VRAM
} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) { } else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
*(T*)&g_vram[vaddr - VRAM_VADDR] = data; *(T*)&g_vram[vaddr - VRAM_VADDR] = data;
// DSP memory // DSP memory
} else if ((vaddr >= DSP_MEMORY_VADDR) && (vaddr < DSP_MEMORY_VADDR_END)) { } else if ((vaddr >= DSP_RAM_VADDR) && (vaddr < DSP_RAM_VADDR_END)) {
*(T*)&g_dsp_mem[vaddr - DSP_MEMORY_VADDR] = data; *(T*)&g_dsp_mem[vaddr - DSP_RAM_VADDR] = data;
//} else if ((vaddr & 0xFFFF0000) == 0x1FF80000) { //} else if ((vaddr & 0xFFFF0000) == 0x1FF80000) {
// ASSERT_MSG(MEMMAP, false, "umimplemented write to Configuration Memory"); // ASSERT_MSG(MEMMAP, false, "umimplemented write to Configuration Memory");
@ -153,16 +145,16 @@ inline void Write(const VAddr vaddr, const T data) {
u8 *GetPointer(const VAddr vaddr) { u8 *GetPointer(const VAddr vaddr) {
// Kernel memory command buffer // Kernel memory command buffer
if (vaddr >= KERNEL_MEMORY_VADDR && vaddr < KERNEL_MEMORY_VADDR_END) { if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
return g_kernel_mem + (vaddr - KERNEL_MEMORY_VADDR); return g_tls_mem + (vaddr - TLS_AREA_VADDR);
// ExeFS:/.code is loaded here // ExeFS:/.code is loaded here
} else if ((vaddr >= EXEFS_CODE_VADDR) && (vaddr < EXEFS_CODE_VADDR_END)) { } else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
return g_exefs_code + (vaddr - EXEFS_CODE_VADDR); return g_exefs_code + (vaddr - PROCESS_IMAGE_VADDR);
// FCRAM - linear heap // FCRAM - linear heap
} else if ((vaddr >= HEAP_LINEAR_VADDR) && (vaddr < HEAP_LINEAR_VADDR_END)) { } else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
return g_heap_linear + (vaddr - HEAP_LINEAR_VADDR); return g_heap_linear + (vaddr - LINEAR_HEAP_VADDR);
// FCRAM - application heap // FCRAM - application heap
} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) { } else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
@ -172,10 +164,6 @@ u8 *GetPointer(const VAddr vaddr) {
} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) { } else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
return g_shared_mem + (vaddr - SHARED_MEMORY_VADDR); return g_shared_mem + (vaddr - SHARED_MEMORY_VADDR);
// System memory
} else if ((vaddr >= SYSTEM_MEMORY_VADDR) && (vaddr < SYSTEM_MEMORY_VADDR_END)) {
return g_system_mem + (vaddr - SYSTEM_MEMORY_VADDR);
// VRAM // VRAM
} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) { } else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
return g_vram + (vaddr - VRAM_VADDR); return g_vram + (vaddr - VRAM_VADDR);
@ -206,7 +194,7 @@ u32 MapBlock_Heap(u32 size, u32 operation, u32 permissions) {
u32 MapBlock_HeapLinear(u32 size, u32 operation, u32 permissions) { u32 MapBlock_HeapLinear(u32 size, u32 operation, u32 permissions) {
MemoryBlock block; MemoryBlock block;
block.base_address = HEAP_LINEAR_VADDR; block.base_address = LINEAR_HEAP_VADDR;
block.size = size; block.size = size;
block.operation = operation; block.operation = operation;
block.permissions = permissions; block.permissions = permissions;

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@ -102,7 +102,7 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
bool is_indexed = (id == PICA_REG_INDEX(trigger_draw_indexed)); bool is_indexed = (id == PICA_REG_INDEX(trigger_draw_indexed));
const auto& index_info = registers.index_array; const auto& index_info = registers.index_array;
const u8* index_address_8 = Memory::GetPointer(PAddrToVAddr(base_address + index_info.offset)); const u8* index_address_8 = Memory::GetPhysicalPointer(base_address + index_info.offset);
const u16* index_address_16 = (u16*)index_address_8; const u16* index_address_16 = (u16*)index_address_8;
bool index_u16 = index_info.format != 0; bool index_u16 = index_info.format != 0;
@ -135,7 +135,7 @@ static inline void WritePicaReg(u32 id, u32 value, u32 mask) {
input.attr[i][2].ToFloat32(), input.attr[i][3].ToFloat32()); input.attr[i][2].ToFloat32(), input.attr[i][3].ToFloat32());
} else { } else {
for (unsigned int comp = 0; comp < vertex_attribute_elements[i]; ++comp) { for (unsigned int comp = 0; comp < vertex_attribute_elements[i]; ++comp) {
const u8* srcdata = Memory::GetPointer(PAddrToVAddr(vertex_attribute_sources[i] + vertex_attribute_strides[i] * vertex + comp * vertex_attribute_element_size[i])); const u8* srcdata = Memory::GetPhysicalPointer(vertex_attribute_sources[i] + vertex_attribute_strides[i] * vertex + comp * vertex_attribute_element_size[i]);
const float srcval = (vertex_attribute_formats[i] == Regs::VertexAttributeFormat::BYTE) ? *(s8*)srcdata : const float srcval = (vertex_attribute_formats[i] == Regs::VertexAttributeFormat::BYTE) ? *(s8*)srcdata :
(vertex_attribute_formats[i] == Regs::VertexAttributeFormat::UBYTE) ? *(u8*)srcdata : (vertex_attribute_formats[i] == Regs::VertexAttributeFormat::UBYTE) ? *(u8*)srcdata :

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@ -998,15 +998,4 @@ union CommandHeader {
BitField<31, 1, u32> group_commands; BitField<31, 1, u32> group_commands;
}; };
// TODO: Ugly, should fix PhysicalToVirtualAddress instead
inline static u32 PAddrToVAddr(u32 addr) {
if (addr >= Memory::VRAM_PADDR && addr < Memory::VRAM_PADDR + Memory::VRAM_SIZE) {
return addr - Memory::VRAM_PADDR + Memory::VRAM_VADDR;
} else if (addr >= Memory::FCRAM_PADDR && addr < Memory::FCRAM_PADDR + Memory::FCRAM_SIZE) {
return addr - Memory::FCRAM_PADDR + Memory::HEAP_LINEAR_VADDR;
} else {
return 0;
}
}
} // namespace } // namespace

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@ -30,7 +30,7 @@ static void DrawPixel(int x, int y, const Math::Vec4<u8>& color) {
const u32 coarse_y = y & ~7; const u32 coarse_y = y & ~7;
u32 bytes_per_pixel = GPU::Regs::BytesPerPixel(GPU::Regs::PixelFormat(registers.framebuffer.color_format.Value())); u32 bytes_per_pixel = GPU::Regs::BytesPerPixel(GPU::Regs::PixelFormat(registers.framebuffer.color_format.Value()));
u32 dst_offset = VideoCore::GetMortonOffset(x, y, bytes_per_pixel) + coarse_y * registers.framebuffer.width * bytes_per_pixel; u32 dst_offset = VideoCore::GetMortonOffset(x, y, bytes_per_pixel) + coarse_y * registers.framebuffer.width * bytes_per_pixel;
u8* dst_pixel = Memory::GetPointer(PAddrToVAddr(addr)) + dst_offset; u8* dst_pixel = Memory::GetPhysicalPointer(addr) + dst_offset;
switch (registers.framebuffer.color_format) { switch (registers.framebuffer.color_format) {
case registers.framebuffer.RGBA8: case registers.framebuffer.RGBA8:
@ -67,7 +67,7 @@ static const Math::Vec4<u8> GetPixel(int x, int y) {
const u32 coarse_y = y & ~7; const u32 coarse_y = y & ~7;
u32 bytes_per_pixel = GPU::Regs::BytesPerPixel(GPU::Regs::PixelFormat(registers.framebuffer.color_format.Value())); u32 bytes_per_pixel = GPU::Regs::BytesPerPixel(GPU::Regs::PixelFormat(registers.framebuffer.color_format.Value()));
u32 src_offset = VideoCore::GetMortonOffset(x, y, bytes_per_pixel) + coarse_y * registers.framebuffer.width * bytes_per_pixel; u32 src_offset = VideoCore::GetMortonOffset(x, y, bytes_per_pixel) + coarse_y * registers.framebuffer.width * bytes_per_pixel;
u8* src_pixel = Memory::GetPointer(PAddrToVAddr(addr)) + src_offset; u8* src_pixel = Memory::GetPhysicalPointer(addr) + src_offset;
switch (registers.framebuffer.color_format) { switch (registers.framebuffer.color_format) {
case registers.framebuffer.RGBA8: case registers.framebuffer.RGBA8:
@ -95,7 +95,7 @@ static const Math::Vec4<u8> GetPixel(int x, int y) {
static u32 GetDepth(int x, int y) { static u32 GetDepth(int x, int y) {
const PAddr addr = registers.framebuffer.GetDepthBufferPhysicalAddress(); const PAddr addr = registers.framebuffer.GetDepthBufferPhysicalAddress();
u8* depth_buffer = Memory::GetPointer(PAddrToVAddr(addr)); u8* depth_buffer = Memory::GetPhysicalPointer(addr);
y = (registers.framebuffer.height - y); y = (registers.framebuffer.height - y);
@ -122,7 +122,7 @@ static u32 GetDepth(int x, int y) {
static void SetDepth(int x, int y, u32 value) { static void SetDepth(int x, int y, u32 value) {
const PAddr addr = registers.framebuffer.GetDepthBufferPhysicalAddress(); const PAddr addr = registers.framebuffer.GetDepthBufferPhysicalAddress();
u8* depth_buffer = Memory::GetPointer(PAddrToVAddr(addr)); u8* depth_buffer = Memory::GetPhysicalPointer(addr);
y = (registers.framebuffer.height - y); y = (registers.framebuffer.height - y);
@ -361,7 +361,7 @@ static void ProcessTriangleInternal(const VertexShader::OutputVertex& v0,
s = GetWrappedTexCoord(texture.config.wrap_s, s, texture.config.width); s = GetWrappedTexCoord(texture.config.wrap_s, s, texture.config.width);
t = texture.config.height - 1 - GetWrappedTexCoord(texture.config.wrap_t, t, texture.config.height); t = texture.config.height - 1 - GetWrappedTexCoord(texture.config.wrap_t, t, texture.config.height);
u8* texture_data = Memory::GetPointer(PAddrToVAddr(texture.config.GetPhysicalAddress())); u8* texture_data = Memory::GetPhysicalPointer(texture.config.GetPhysicalAddress());
auto info = DebugUtils::TextureInfo::FromPicaRegister(texture.config, texture.format); auto info = DebugUtils::TextureInfo::FromPicaRegister(texture.config, texture.format);
texture_color[i] = DebugUtils::LookupTexture(texture_data, s, t, info); texture_color[i] = DebugUtils::LookupTexture(texture_data, s, t, info);

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@ -119,15 +119,15 @@ void RendererOpenGL::SwapBuffers() {
void RendererOpenGL::LoadFBToActiveGLTexture(const GPU::Regs::FramebufferConfig& framebuffer, void RendererOpenGL::LoadFBToActiveGLTexture(const GPU::Regs::FramebufferConfig& framebuffer,
const TextureInfo& texture) { const TextureInfo& texture) {
const VAddr framebuffer_vaddr = Memory::PhysicalToVirtualAddress( const PAddr framebuffer_addr = framebuffer.active_fb == 0 ?
framebuffer.active_fb == 0 ? framebuffer.address_left1 : framebuffer.address_left2); framebuffer.address_left1 : framebuffer.address_left2;
LOG_TRACE(Render_OpenGL, "0x%08x bytes from 0x%08x(%dx%d), fmt %x", LOG_TRACE(Render_OpenGL, "0x%08x bytes from 0x%08x(%dx%d), fmt %x",
framebuffer.stride * framebuffer.height, framebuffer.stride * framebuffer.height,
framebuffer_vaddr, (int)framebuffer.width, framebuffer_addr, (int)framebuffer.width,
(int)framebuffer.height, (int)framebuffer.format); (int)framebuffer.height, (int)framebuffer.format);
const u8* framebuffer_data = Memory::GetPointer(framebuffer_vaddr); const u8* framebuffer_data = Memory::GetPhysicalPointer(framebuffer_addr);
int bpp = GPU::Regs::BytesPerPixel(framebuffer.color_format); int bpp = GPU::Regs::BytesPerPixel(framebuffer.color_format);
size_t pixel_stride = framebuffer.stride / bpp; size_t pixel_stride = framebuffer.stride / bpp;