Fix validation errors on less compatible Intel GPU
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339a37f8cb
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f6868ae4dd
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@ -285,6 +285,9 @@ void BufferCacheRuntime::BindQuadArrayIndexBuffer(u32 first, u32 count) {
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void BufferCacheRuntime::BindVertexBuffer(u32 index, VkBuffer buffer, u32 offset, u32 size,
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u32 stride) {
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if (index >= device.GetMaxVertexInputBindings()) {
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return;
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}
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if (device.IsExtExtendedDynamicStateSupported()) {
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scheduler.Record([index, buffer, offset, size, stride](vk::CommandBuffer cmdbuf) {
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const VkDeviceSize vk_offset = buffer != VK_NULL_HANDLE ? offset : 0;
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@ -529,7 +529,9 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
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static_vector<VkVertexInputBindingDivisorDescriptionEXT, 32> vertex_binding_divisors;
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static_vector<VkVertexInputAttributeDescription, 32> vertex_attributes;
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if (key.state.dynamic_vertex_input) {
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for (size_t index = 0; index < key.state.attributes.size(); ++index) {
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const size_t num_vertex_arrays = std::min(
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key.state.attributes.size(), static_cast<size_t>(device.GetMaxVertexInputBindings()));
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for (size_t index = 0; index < num_vertex_arrays; ++index) {
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const u32 type = key.state.DynamicAttributeType(index);
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if (!stage_infos[0].loads.Generic(index) || type == 0) {
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continue;
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@ -551,7 +553,9 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
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});
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}
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} else {
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for (size_t index = 0; index < Maxwell::NumVertexArrays; ++index) {
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const size_t num_vertex_arrays = std::min(
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Maxwell::NumVertexArrays, static_cast<size_t>(device.GetMaxVertexInputBindings()));
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for (size_t index = 0; index < num_vertex_arrays; ++index) {
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const bool instanced = key.state.binding_divisors[index] != 0;
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const auto rate =
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instanced ? VK_VERTEX_INPUT_RATE_INSTANCE : VK_VERTEX_INPUT_RATE_VERTEX;
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@ -580,6 +584,8 @@ void GraphicsPipeline::MakePipeline(VkRenderPass render_pass) {
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});
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}
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}
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ASSERT(vertex_attributes.size() <= device.GetMaxVertexInputAttributes());
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VkPipelineVertexInputStateCreateInfo vertex_input_ci{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
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.pNext = nullptr,
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@ -341,6 +341,15 @@ PipelineCache::PipelineCache(RasterizerVulkan& rasterizer_, const Device& device
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.support_snorm_render_buffer = true,
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.support_viewport_index_layer = device.IsExtShaderViewportIndexLayerSupported(),
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};
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if (device.GetMaxVertexInputAttributes() < Maxwell::NumVertexAttributes) {
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LOG_WARNING(Render_Vulkan, "maxVertexInputAttributes is too low: {} < {}",
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device.GetMaxVertexInputAttributes(), Maxwell::NumVertexAttributes);
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}
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if (device.GetMaxVertexInputBindings() < Maxwell::NumVertexArrays) {
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LOG_WARNING(Render_Vulkan, "maxVertexInputBindings is too low: {} < {}",
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device.GetMaxVertexInputBindings(), Maxwell::NumVertexArrays);
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}
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}
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PipelineCache::~PipelineCache() = default;
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@ -1380,6 +1380,10 @@ void Device::SetupFeatures() {
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is_shader_storage_image_multisample = features.shaderStorageImageMultisample;
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is_blit_depth_stencil_supported = TestDepthStencilBlits();
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is_optimal_astc_supported = IsOptimalAstcSupported(features);
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const VkPhysicalDeviceLimits& limits{properties.limits};
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max_vertex_input_attributes = limits.maxVertexInputAttributes;
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max_vertex_input_bindings = limits.maxVertexInputBindings;
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}
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void Device::SetupProperties() {
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@ -368,6 +368,14 @@ public:
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return must_emulate_bgr565;
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}
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u32 GetMaxVertexInputAttributes() const {
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return max_vertex_input_attributes;
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}
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u32 GetMaxVertexInputBindings() const {
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return max_vertex_input_bindings;
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}
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private:
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/// Checks if the physical device is suitable.
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void CheckSuitability(bool requires_swapchain) const;
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@ -467,6 +475,8 @@ private:
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bool supports_d24_depth{}; ///< Supports D24 depth buffers.
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bool cant_blit_msaa{}; ///< Does not support MSAA<->MSAA blitting.
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bool must_emulate_bgr565{}; ///< Emulates BGR565 by swizzling RGB565 format.
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u32 max_vertex_input_attributes{}; ///< Max vertex input attributes in pipeline
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u32 max_vertex_input_bindings{}; ///< Max vertex input buffers in pipeline
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// Telemetry parameters
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std::string vendor_name; ///< Device's driver name.
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