texture_cache/surface_base: Address feedback
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75de730e28
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0837290992
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@ -19,6 +19,10 @@ using Tegra::Texture::ConvertFromGuestToHost;
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using VideoCore::MortonSwizzleMode;
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using VideoCore::MortonSwizzleMode;
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using VideoCore::Surface::SurfaceCompression;
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using VideoCore::Surface::SurfaceCompression;
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StagingCache::StagingCache() = default;
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StagingCache::~StagingCache() = default;
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SurfaceBaseImpl::SurfaceBaseImpl(GPUVAddr gpu_addr, const SurfaceParams& params)
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SurfaceBaseImpl::SurfaceBaseImpl(GPUVAddr gpu_addr, const SurfaceParams& params)
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: params{params}, mipmap_sizes(params.num_levels),
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: params{params}, mipmap_sizes(params.num_levels),
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mipmap_offsets(params.num_levels), gpu_addr{gpu_addr}, host_memory_size{
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mipmap_offsets(params.num_levels), gpu_addr{gpu_addr}, host_memory_size{
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@ -40,13 +40,17 @@ enum class MatchTopologyResult : u32 {
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class StagingCache {
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class StagingCache {
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public:
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public:
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StagingCache() {}
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explicit StagingCache();
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~StagingCache() = default;
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~StagingCache();
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std::vector<u8>& GetBuffer(std::size_t index) {
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std::vector<u8>& GetBuffer(std::size_t index) {
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return staging_buffer[index];
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return staging_buffer[index];
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}
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}
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const std::vector<u8>& GetBuffer(std::size_t index) const {
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return staging_buffer[index];
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}
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void SetSize(std::size_t size) {
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void SetSize(std::size_t size) {
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staging_buffer.resize(size);
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staging_buffer.resize(size);
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}
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}
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