yuzu-emu
/
yuzu
Archived
1
0
Fork 0
Code

Merge pull request #6187 from lioncash/sign-conv 

texure_cache/util: Resolve implicit sign conversions with std::reduce
This commit is contained in:
bunnei 2021-04-13 09:46:32 -07:00 committed by GitHub
parent 335a3cc115 fddb278aa3
commit 154eb3cfbe
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 15 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
src/video_core/texture_cache/util.cpp
View File

@ -268,16 +268,19 @@ template <u32 GOB_EXTENT>
return num_tiles << shift;
}
[[nodiscard]] constexpr std::array<u32, MAX_MIP_LEVELS> CalculateLevelSizes(const LevelInfo& info,
u32 num_levels) {
[[nodiscard]] constexpr LevelArray CalculateLevelSizes(const LevelInfo& info, u32 num_levels) {
ASSERT(num_levels <= MAX_MIP_LEVELS);
std::array<u32, MAX_MIP_LEVELS> sizes{};
LevelArray sizes{};
for (u32 level = 0; level < num_levels; ++level) {
sizes[level] = CalculateLevelSize(info, level);
}
return sizes;
}
[[nodiscard]] u32 CalculateLevelBytes(const LevelArray& sizes, u32 num_levels) {
return std::reduce(sizes.begin(), sizes.begin() + num_levels, 0U);
}
[[nodiscard]] constexpr LevelInfo MakeLevelInfo(PixelFormat format, Extent3D size, Extent3D block,
u32 num_samples, u32 tile_width_spacing) {
const auto [samples_x, samples_y] = Samples(num_samples);
@ -566,10 +569,10 @@ void SwizzleBlockLinearImage(Tegra::MemoryManager& gpu_memory, GPUVAddr gpu_addr
const u32 num_levels = info.resources.levels;
const std::array sizes = CalculateLevelSizes(level_info, num_levels);
size_t guest_offset = std::reduce(sizes.begin(), sizes.begin() + level, 0);
size_t guest_offset = CalculateLevelBytes(sizes, level);
const size_t layer_stride =
AlignLayerSize(std::reduce(sizes.begin(), sizes.begin() + num_levels, 0), size,
level_info.block, tile_size.height, info.tile_width_spacing);
AlignLayerSize(CalculateLevelBytes(sizes, num_levels), size, level_info.block,
tile_size.height, info.tile_width_spacing);
const size_t subresource_size = sizes[level];
const auto dst_data = std::make_unique<u8[]>(subresource_size);
@ -643,10 +646,10 @@ u32 CalculateLayerSize(const ImageInfo& info) noexcept {
info.tile_width_spacing, info.resources.levels);
}
std::array<u32, MAX_MIP_LEVELS> CalculateMipLevelOffsets(const ImageInfo& info) noexcept {
LevelArray CalculateMipLevelOffsets(const ImageInfo& info) noexcept {
ASSERT(info.resources.levels <= static_cast<s32>(MAX_MIP_LEVELS));
const LevelInfo level_info = MakeLevelInfo(info);
std::array<u32, MAX_MIP_LEVELS> offsets{};
LevelArray offsets{};
u32 offset = 0;
for (s32 level = 0; level < info.resources.levels; ++level) {
offsets[level] = offset;
@ -812,7 +815,7 @@ std::vector<BufferImageCopy> UnswizzleImage(Tegra::MemoryManager& gpu_memory, GP
const Extent2D tile_size = DefaultBlockSize(info.format);
const std::array level_sizes = CalculateLevelSizes(level_info, num_levels);
const Extent2D gob = GobSize(bpp_log2, info.block.height, info.tile_width_spacing);
const u32 layer_size = std::reduce(level_sizes.begin(), level_sizes.begin() + num_levels, 0);
const u32 layer_size = CalculateLevelBytes(level_sizes, num_levels);
const u32 layer_stride = AlignLayerSize(layer_size, size, level_info.block, tile_size.height,
info.tile_width_spacing);
size_t guest_offset = 0;

5
src/video_core/texture_cache/util.h
View File

@ -20,6 +20,8 @@ namespace VideoCommon {
using Tegra::Texture::TICEntry;
using LevelArray = std::array<u32, MAX_MIP_LEVELS>;
struct OverlapResult {
GPUVAddr gpu_addr;
VAddr cpu_addr;
@ -36,8 +38,7 @@ struct OverlapResult {
[[nodiscard]] u32 CalculateLayerSize(const ImageInfo& info) noexcept;
[[nodiscard]] std::array<u32, MAX_MIP_LEVELS> CalculateMipLevelOffsets(
const ImageInfo& info) noexcept;
[[nodiscard]] LevelArray CalculateMipLevelOffsets(const ImageInfo& info) noexcept;
[[nodiscard]] std::vector<u32> CalculateSliceOffsets(const ImageInfo& info);