yuzu-emu
/
yuzu
Archived
1
0
Fork 0
Code

Texture_Cache: Address Feedback

This commit is contained in:
Fernando Sahmkow 2019-07-14 17:42:39 -04:00
parent 0f54b541f4
commit 2ac7472d3f
3 changed files with 17 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/video_core/texture_cache/surface_base.h
View File

@ -312,11 +312,13 @@ private:
return view;
}
static constexpr u32 NO_RT = 0xFFFFFFFF;
bool is_modified{};
bool is_target{};
bool is_registered{};
bool is_picked{};
u32 index{0xFFFFFFFF};
u32 index{NO_RT};
u64 modification_tick{};
};

9
src/video_core/texture_cache/surface_params.cpp
View File

@ -297,12 +297,11 @@ std::size_t SurfaceParams::GetInnerMipmapMemorySize(u32 level, bool as_host_size
return Tegra::Texture::CalculateSize(!as_host_size, GetBytesPerPixel(), width, height,
depth, GetMipBlockHeight(level),
GetMipBlockDepth(level));
} else if (as_host_size || IsBuffer()) {
return GetBytesPerPixel() * width * height * depth;
} else {
if (as_host_size || IsBuffer()) {
return GetBytesPerPixel() * width * height * depth;
} else {
return pitch * height * depth;
}
// Linear Texture Case
return pitch * height * depth;
}
}

17
src/video_core/texture_cache/texture_cache.h
View File

@ -133,11 +133,11 @@ public:
regs.zeta.memory_layout.block_depth, regs.zeta.memory_layout.type)};
auto surface_view = GetSurface(gpu_addr, depth_params, preserve_contents, true);
if (depth_buffer.target)
depth_buffer.target->MarkAsRenderTarget(false, -1);
depth_buffer.target->MarkAsRenderTarget(false, NO_RT);
depth_buffer.target = surface_view.first;
depth_buffer.view = surface_view.second;
if (depth_buffer.target)
depth_buffer.target->MarkAsRenderTarget(true, 8);
depth_buffer.target->MarkAsRenderTarget(true, DEPTH_RT);
return surface_view.second;
}
@ -167,7 +167,7 @@ public:
auto surface_view = GetSurface(gpu_addr, SurfaceParams::CreateForFramebuffer(system, index),
preserve_contents, true);
if (render_targets[index].target)
render_targets[index].target->MarkAsRenderTarget(false, -1);
render_targets[index].target->MarkAsRenderTarget(false, NO_RT);
render_targets[index].target = surface_view.first;
render_targets[index].view = surface_view.second;
if (render_targets[index].target)
@ -191,7 +191,7 @@ public:
if (depth_buffer.target == nullptr) {
return;
}
depth_buffer.target->MarkAsRenderTarget(false, -1);
depth_buffer.target->MarkAsRenderTarget(false, NO_RT);
depth_buffer.target = nullptr;
depth_buffer.view = nullptr;
}
@ -200,7 +200,7 @@ public:
if (render_targets[index].target == nullptr) {
return;
}
render_targets[index].target->MarkAsRenderTarget(false, -1);
render_targets[index].target->MarkAsRenderTarget(false, NO_RT);
render_targets[index].target = nullptr;
render_targets[index].view = nullptr;
}
@ -272,8 +272,8 @@ protected:
void ManageRenderTargetUnregister(TSurface& surface) {
auto& maxwell3d = system.GPU().Maxwell3D();
u32 index = surface->GetRenderTarget();
if (index == 8) {
const u32 index = surface->GetRenderTarget();
if (index == DEPTH_RT) {
maxwell3d.dirty_flags.zeta_buffer = true;
} else {
maxwell3d.dirty_flags.color_buffer.set(index, true);
@ -797,6 +797,9 @@ private:
static constexpr u64 registry_page_size{1 << registry_page_bits};
std::unordered_map<CacheAddr, std::vector<TSurface>> registry;
static constexpr u32 DEPTH_RT = 8;
static constexpr u32 NO_RT = 0xFFFFFFFF;
// The L1 Cache is used for fast texture lookup before checking the overlaps
// This avoids calculating size and other stuffs.
std::unordered_map<CacheAddr, TSurface> l1_cache;