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logging: Rename category "Core_ARM11" to "Core_ARM".

This commit is contained in:
bunnei 2017-10-23 00:13:12 -04:00
parent 3f0caefdf5
commit 45db4bb3ea
10 changed files with 89 additions and 89 deletions
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2
src/common/logging/backend.cpp
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@ -21,7 +21,7 @@ namespace Log {
SUB(Common, Filesystem) \ SUB(Common, Filesystem) \
SUB(Common, Memory) \ SUB(Common, Memory) \
CLS(Core) \ CLS(Core) \
SUB(Core, ARM11) \ SUB(Core, ARM) \
SUB(Core, Timing) \ SUB(Core, Timing) \
CLS(Config) \ CLS(Config) \
CLS(Debug) \ CLS(Debug) \

2
src/common/logging/log.h
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@ -37,7 +37,7 @@ enum class Class : ClassType {
Common_Filesystem, ///< Filesystem interface library Common_Filesystem, ///< Filesystem interface library
Common_Memory, ///< Memory mapping and management functions Common_Memory, ///< Memory mapping and management functions
Core, ///< LLE emulation core Core, ///< LLE emulation core
Core_ARM11, ///< ARM11 CPU core Core_ARM, ///< ARM CPU core
Core_Timing, ///< CoreTiming functions Core_Timing, ///< CoreTiming functions
Config, ///< Emulator configuration (including commandline) Config, ///< Emulator configuration (including commandline)
Debug, ///< Debugging tools Debug, ///< Debugging tools

28
src/core/arm/dyncom/arm_dyncom_interpreter.cpp
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@ -230,7 +230,7 @@ static unsigned int DPO(RotateRightByRegister)(ARMul_State* cpu, unsigned int sh
} }
#define DEBUG_MSG \ #define DEBUG_MSG \
LOG_DEBUG(Core_ARM11, "inst is %x", inst); \ LOG_DEBUG(Core_ARM, "inst is %x", inst); \
CITRA_IGNORE_EXIT(0) CITRA_IGNORE_EXIT(0)
#define LnSWoUB(s) glue(LnSWoUB, s) #define LnSWoUB(s) glue(LnSWoUB, s)
@ -769,7 +769,7 @@ static ThumbDecodeStatus DecodeThumbInstruction(u32 inst, u32 addr, u32* arm_ins
inst_index = table_length - 4; inst_index = table_length - 4;
*ptr_inst_base = arm_instruction_trans[inst_index](tinstr, inst_index); *ptr_inst_base = arm_instruction_trans[inst_index](tinstr, inst_index);
} else { } else {
LOG_ERROR(Core_ARM11, "thumb decoder error"); LOG_ERROR(Core_ARM, "thumb decoder error");
} }
break; break;
case 28: case 28:
@ -827,9 +827,9 @@ static unsigned int InterpreterTranslateInstruction(const ARMul_State* cpu, cons
int idx; int idx;
if (DecodeARMInstruction(inst, &idx) == ARMDecodeStatus::FAILURE) { if (DecodeARMInstruction(inst, &idx) == ARMDecodeStatus::FAILURE) {
LOG_ERROR(Core_ARM11, "Decode failure.\tPC: [0x%08" PRIX32 "]\tInstruction: %08" PRIX32, LOG_ERROR(Core_ARM, "Decode failure.\tPC: [0x%08" PRIX32 "]\tInstruction: %08" PRIX32,
phys_addr, inst); phys_addr, inst);
LOG_ERROR(Core_ARM11, "cpsr=0x%" PRIX32 ", cpu->TFlag=%d, r15=0x%08" PRIX32, cpu->Cpsr, LOG_ERROR(Core_ARM, "cpsr=0x%" PRIX32 ", cpu->TFlag=%d, r15=0x%08" PRIX32, cpu->Cpsr,
cpu->TFlag, cpu->Reg[15]); cpu->TFlag, cpu->Reg[15]);
CITRA_IGNORE_EXIT(-1); CITRA_IGNORE_EXIT(-1);
} }
@ -1802,7 +1802,7 @@ BIC_INST : {
BKPT_INST : { BKPT_INST : {
if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
bkpt_inst* const inst_cream = (bkpt_inst*)inst_base->component; bkpt_inst* const inst_cream = (bkpt_inst*)inst_base->component;
LOG_DEBUG(Core_ARM11, "Breakpoint instruction hit. Immediate: 0x%08X", inst_cream->imm); LOG_DEBUG(Core_ARM, "Breakpoint instruction hit. Immediate: 0x%08X", inst_cream->imm);
} }
cpu->Reg[15] += cpu->GetInstructionSize(); cpu->Reg[15] += cpu->GetInstructionSize();
INC_PC(sizeof(bkpt_inst)); INC_PC(sizeof(bkpt_inst));
@ -2017,7 +2017,7 @@ EOR_INST : {
} }
LDC_INST : { LDC_INST : {
// Instruction not implemented // Instruction not implemented
// LOG_CRITICAL(Core_ARM11, "unimplemented instruction"); // LOG_CRITICAL(Core_ARM, "unimplemented instruction");
cpu->Reg[15] += cpu->GetInstructionSize(); cpu->Reg[15] += cpu->GetInstructionSize();
INC_PC(sizeof(ldc_inst)); INC_PC(sizeof(ldc_inst));
FETCH_INST; FETCH_INST;
@ -2368,7 +2368,7 @@ MCRR_INST : {
if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
mcrr_inst* const inst_cream = (mcrr_inst*)inst_base->component; mcrr_inst* const inst_cream = (mcrr_inst*)inst_base->component;
LOG_ERROR(Core_ARM11, "MCRR executed | Coprocessor: %u, CRm %u, opc1: %u, Rt: %u, Rt2: %u", LOG_ERROR(Core_ARM, "MCRR executed | Coprocessor: %u, CRm %u, opc1: %u, Rt: %u, Rt2: %u",
inst_cream->cp_num, inst_cream->crm, inst_cream->opcode_1, inst_cream->rt, inst_cream->cp_num, inst_cream->crm, inst_cream->opcode_1, inst_cream->rt,
inst_cream->rt2); inst_cream->rt2);
} }
@ -2451,7 +2451,7 @@ MRRC_INST : {
if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
mcrr_inst* const inst_cream = (mcrr_inst*)inst_base->component; mcrr_inst* const inst_cream = (mcrr_inst*)inst_base->component;
LOG_ERROR(Core_ARM11, "MRRC executed | Coprocessor: %u, CRm %u, opc1: %u, Rt: %u, Rt2: %u", LOG_ERROR(Core_ARM, "MRRC executed | Coprocessor: %u, CRm %u, opc1: %u, Rt: %u, Rt2: %u",
inst_cream->cp_num, inst_cream->crm, inst_cream->opcode_1, inst_cream->rt, inst_cream->cp_num, inst_cream->crm, inst_cream->opcode_1, inst_cream->rt,
inst_cream->rt2); inst_cream->rt2);
} }
@ -3078,7 +3078,7 @@ SETEND_INST : {
else else
cpu->Cpsr &= ~(1 << 9); cpu->Cpsr &= ~(1 << 9);
LOG_WARNING(Core_ARM11, "SETEND %s executed", big_endian ? "BE" : "LE"); LOG_WARNING(Core_ARM, "SETEND %s executed", big_endian ? "BE" : "LE");
cpu->Reg[15] += cpu->GetInstructionSize(); cpu->Reg[15] += cpu->GetInstructionSize();
INC_PC(sizeof(setend_inst)); INC_PC(sizeof(setend_inst));
@ -3089,7 +3089,7 @@ SETEND_INST : {
SEV_INST : { SEV_INST : {
// Stubbed, as SEV is a hint instruction. // Stubbed, as SEV is a hint instruction.
if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
LOG_TRACE(Core_ARM11, "SEV executed."); LOG_TRACE(Core_ARM, "SEV executed.");
} }
cpu->Reg[15] += cpu->GetInstructionSize(); cpu->Reg[15] += cpu->GetInstructionSize();
@ -3539,7 +3539,7 @@ SSAT16_INST : {
STC_INST : { STC_INST : {
// Instruction not implemented // Instruction not implemented
// LOG_CRITICAL(Core_ARM11, "unimplemented instruction"); // LOG_CRITICAL(Core_ARM, "unimplemented instruction");
cpu->Reg[15] += cpu->GetInstructionSize(); cpu->Reg[15] += cpu->GetInstructionSize();
INC_PC(sizeof(stc_inst)); INC_PC(sizeof(stc_inst));
FETCH_INST; FETCH_INST;
@ -4529,7 +4529,7 @@ UXTB16_INST : {
WFE_INST : { WFE_INST : {
// Stubbed, as WFE is a hint instruction. // Stubbed, as WFE is a hint instruction.
if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
LOG_TRACE(Core_ARM11, "WFE executed."); LOG_TRACE(Core_ARM, "WFE executed.");
} }
cpu->Reg[15] += cpu->GetInstructionSize(); cpu->Reg[15] += cpu->GetInstructionSize();
@ -4541,7 +4541,7 @@ WFE_INST : {
WFI_INST : { WFI_INST : {
// Stubbed, as WFI is a hint instruction. // Stubbed, as WFI is a hint instruction.
if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
LOG_TRACE(Core_ARM11, "WFI executed."); LOG_TRACE(Core_ARM, "WFI executed.");
} }
cpu->Reg[15] += cpu->GetInstructionSize(); cpu->Reg[15] += cpu->GetInstructionSize();
@ -4553,7 +4553,7 @@ WFI_INST : {
YIELD_INST : { YIELD_INST : {
// Stubbed, as YIELD is a hint instruction. // Stubbed, as YIELD is a hint instruction.
if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) { if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
LOG_TRACE(Core_ARM11, "YIELD executed."); LOG_TRACE(Core_ARM, "YIELD executed.");
} }
cpu->Reg[15] += cpu->GetInstructionSize(); cpu->Reg[15] += cpu->GetInstructionSize();

2
src/core/arm/dyncom/arm_dyncom_trans.cpp
View File

@ -185,7 +185,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index) {
inst_cream->opcode_1 = BITS(inst, 20, 23); inst_cream->opcode_1 = BITS(inst, 20, 23);
inst_cream->inst = inst; inst_cream->inst = inst;
LOG_TRACE(Core_ARM11, "inst %x index %x", inst, index); LOG_TRACE(Core_ARM, "inst %x index %x", inst, index);
return inst_base; return inst_base;
} }
static ARM_INST_PTR INTERPRETER_TRANSLATE(clrex)(unsigned int inst, int index) { static ARM_INST_PTR INTERPRETER_TRANSLATE(clrex)(unsigned int inst, int index) {

2
src/core/arm/skyeye_common/armstate.cpp
View File

@ -428,7 +428,7 @@ u32 ARMul_State::ReadCP15Register(u32 crn, u32 opcode_1, u32 crm, u32 opcode_2)
} }
} }
LOG_ERROR(Core_ARM11, "MRC CRn=%u, CRm=%u, OP1=%u OP2=%u is not implemented. Returning zero.", LOG_ERROR(Core_ARM, "MRC CRn=%u, CRm=%u, OP1=%u OP2=%u is not implemented. Returning zero.",
crn, crm, opcode_1, opcode_2); crn, crm, opcode_1, opcode_2);
return 0; return 0;
} }

12
src/core/arm/skyeye_common/vfp/vfp.cpp
View File

@ -90,23 +90,23 @@ void VMOVR(ARMul_State* state, u32 single, u32 d, u32 m) {
/* Miscellaneous functions */ /* Miscellaneous functions */
s32 vfp_get_float(ARMul_State* state, unsigned int reg) { s32 vfp_get_float(ARMul_State* state, unsigned int reg) {
LOG_TRACE(Core_ARM11, "VFP get float: s%d=[%08x]", reg, state->ExtReg[reg]); LOG_TRACE(Core_ARM, "VFP get float: s%d=[%08x]", reg, state->ExtReg[reg]);
return state->ExtReg[reg]; return state->ExtReg[reg];
} }
void vfp_put_float(ARMul_State* state, s32 val, unsigned int reg) { void vfp_put_float(ARMul_State* state, s32 val, unsigned int reg) {
LOG_TRACE(Core_ARM11, "VFP put float: s%d <= [%08x]", reg, val); LOG_TRACE(Core_ARM, "VFP put float: s%d <= [%08x]", reg, val);
state->ExtReg[reg] = val; state->ExtReg[reg] = val;
} }
u64 vfp_get_double(ARMul_State* state, unsigned int reg) { u64 vfp_get_double(ARMul_State* state, unsigned int reg) {
u64 result = ((u64)state->ExtReg[reg * 2 + 1]) << 32 | state->ExtReg[reg * 2]; u64 result = ((u64)state->ExtReg[reg * 2 + 1]) << 32 | state->ExtReg[reg * 2];
LOG_TRACE(Core_ARM11, "VFP get double: s[%d-%d]=[%016llx]", reg * 2 + 1, reg * 2, result); LOG_TRACE(Core_ARM, "VFP get double: s[%d-%d]=[%016llx]", reg * 2 + 1, reg * 2, result);
return result; return result;
} }
void vfp_put_double(ARMul_State* state, u64 val, unsigned int reg) { void vfp_put_double(ARMul_State* state, u64 val, unsigned int reg) {
LOG_TRACE(Core_ARM11, "VFP put double: s[%d-%d] <= [%08x-%08x]", reg * 2 + 1, reg * 2, LOG_TRACE(Core_ARM, "VFP put double: s[%d-%d] <= [%08x-%08x]", reg * 2 + 1, reg * 2,
(u32)(val >> 32), (u32)(val & 0xffffffff)); (u32)(val >> 32), (u32)(val & 0xffffffff));
state->ExtReg[reg * 2] = (u32)(val & 0xffffffff); state->ExtReg[reg * 2] = (u32)(val & 0xffffffff);
state->ExtReg[reg * 2 + 1] = (u32)(val >> 32); state->ExtReg[reg * 2 + 1] = (u32)(val >> 32);
@ -116,10 +116,10 @@ void vfp_put_double(ARMul_State* state, u64 val, unsigned int reg) {
* Process bitmask of exception conditions. (from vfpmodule.c) * Process bitmask of exception conditions. (from vfpmodule.c)
*/ */
void vfp_raise_exceptions(ARMul_State* state, u32 exceptions, u32 inst, u32 fpscr) { void vfp_raise_exceptions(ARMul_State* state, u32 exceptions, u32 inst, u32 fpscr) {
LOG_TRACE(Core_ARM11, "VFP: raising exceptions %08x", exceptions); LOG_TRACE(Core_ARM, "VFP: raising exceptions %08x", exceptions);
if (exceptions == VFP_EXCEPTION_ERROR) { if (exceptions == VFP_EXCEPTION_ERROR) {
LOG_CRITICAL(Core_ARM11, "unhandled bounce %x", inst); LOG_CRITICAL(Core_ARM, "unhandled bounce %x", inst);
Crash(); Crash();
} }

2
src/core/arm/skyeye_common/vfp/vfp.h
View File

@ -22,7 +22,7 @@
#include "core/arm/skyeye_common/vfp/vfp_helper.h" /* for references to cdp SoftFloat functions */ #include "core/arm/skyeye_common/vfp/vfp_helper.h" /* for references to cdp SoftFloat functions */
#define VFP_DEBUG_UNTESTED(x) LOG_TRACE(Core_ARM11, "in func %s, " #x " untested", __FUNCTION__); #define VFP_DEBUG_UNTESTED(x) LOG_TRACE(Core_ARM, "in func %s, " #x " untested", __FUNCTION__);
#define CHECK_VFP_ENABLED #define CHECK_VFP_ENABLED
#define CHECK_VFP_CDP_RET vfp_raise_exceptions(cpu, ret, inst_cream->instr, cpu->VFP[VFP_FPSCR]); #define CHECK_VFP_CDP_RET vfp_raise_exceptions(cpu, ret, inst_cream->instr, cpu->VFP[VFP_FPSCR]);

76
src/core/arm/skyeye_common/vfp/vfpdouble.cpp
View File

@ -62,7 +62,7 @@ static struct vfp_double vfp_double_default_qnan = {
}; };
static void vfp_double_dump(const char* str, struct vfp_double* d) { static void vfp_double_dump(const char* str, struct vfp_double* d) {
LOG_TRACE(Core_ARM11, "VFP: %s: sign=%d exponent=%d significand=%016llx", str, d->sign != 0, LOG_TRACE(Core_ARM, "VFP: %s: sign=%d exponent=%d significand=%016llx", str, d->sign != 0,
d->exponent, d->significand); d->exponent, d->significand);
} }
@ -164,7 +164,7 @@ u32 vfp_double_normaliseround(ARMul_State* state, int dd, struct vfp_double* vd,
} else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vd->sign != 0)) } else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vd->sign != 0))
incr = (1ULL << (VFP_DOUBLE_LOW_BITS + 1)) - 1; incr = (1ULL << (VFP_DOUBLE_LOW_BITS + 1)) - 1;
LOG_TRACE(Core_ARM11, "VFP: rounding increment = 0x%08llx", incr); LOG_TRACE(Core_ARM, "VFP: rounding increment = 0x%08llx", incr);
/* /*
* Is our rounding going to overflow? * Is our rounding going to overflow?
@ -219,7 +219,7 @@ pack:
vfp_double_dump("pack: final", vd); vfp_double_dump("pack: final", vd);
{ {
s64 d = vfp_double_pack(vd); s64 d = vfp_double_pack(vd);
LOG_TRACE(Core_ARM11, "VFP: %s: d(d%d)=%016llx exceptions=%08x", func, dd, d, exceptions); LOG_TRACE(Core_ARM, "VFP: %s: d(d%d)=%016llx exceptions=%08x", func, dd, d, exceptions);
vfp_put_double(state, d, dd); vfp_put_double(state, d, dd);
} }
return exceptions; return exceptions;
@ -272,25 +272,25 @@ static u32 vfp_propagate_nan(struct vfp_double* vdd, struct vfp_double* vdn, str
* Extended operations * Extended operations
*/ */
static u32 vfp_double_fabs(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) { static u32 vfp_double_fabs(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
vfp_put_double(state, vfp_double_packed_abs(vfp_get_double(state, dm)), dd); vfp_put_double(state, vfp_double_packed_abs(vfp_get_double(state, dm)), dd);
return 0; return 0;
} }
static u32 vfp_double_fcpy(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) { static u32 vfp_double_fcpy(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
vfp_put_double(state, vfp_get_double(state, dm), dd); vfp_put_double(state, vfp_get_double(state, dm), dd);
return 0; return 0;
} }
static u32 vfp_double_fneg(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) { static u32 vfp_double_fneg(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
vfp_put_double(state, vfp_double_packed_negate(vfp_get_double(state, dm)), dd); vfp_put_double(state, vfp_double_packed_negate(vfp_get_double(state, dm)), dd);
return 0; return 0;
} }
static u32 vfp_double_fsqrt(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) { static u32 vfp_double_fsqrt(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
vfp_double vdm, vdd, *vdp; vfp_double vdm, vdd, *vdp;
int ret, tm; int ret, tm;
u32 exceptions = 0; u32 exceptions = 0;
@ -387,7 +387,7 @@ static u32 vfp_compare(ARMul_State* state, int dd, int signal_on_qnan, int dm, u
s64 d, m; s64 d, m;
u32 ret = 0; u32 ret = 0;
LOG_TRACE(Core_ARM11, "In %s, state=0x%p, fpscr=0x%x", __FUNCTION__, state, fpscr); LOG_TRACE(Core_ARM, "In %s, state=0x%p, fpscr=0x%x", __FUNCTION__, state, fpscr);
m = vfp_get_double(state, dm); m = vfp_get_double(state, dm);
if (vfp_double_packed_exponent(m) == 2047 && vfp_double_packed_mantissa(m)) { if (vfp_double_packed_exponent(m) == 2047 && vfp_double_packed_mantissa(m)) {
ret |= FPSCR_CFLAG | FPSCR_VFLAG; ret |= FPSCR_CFLAG | FPSCR_VFLAG;
@ -444,28 +444,28 @@ static u32 vfp_compare(ARMul_State* state, int dd, int signal_on_qnan, int dm, u
ret |= FPSCR_CFLAG; ret |= FPSCR_CFLAG;
} }
} }
LOG_TRACE(Core_ARM11, "In %s, state=0x%p, ret=0x%x", __FUNCTION__, state, ret); LOG_TRACE(Core_ARM, "In %s, state=0x%p, ret=0x%x", __FUNCTION__, state, ret);
return ret; return ret;
} }
static u32 vfp_double_fcmp(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) { static u32 vfp_double_fcmp(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
return vfp_compare(state, dd, 0, dm, fpscr); return vfp_compare(state, dd, 0, dm, fpscr);
} }
static u32 vfp_double_fcmpe(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) { static u32 vfp_double_fcmpe(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
return vfp_compare(state, dd, 1, dm, fpscr); return vfp_compare(state, dd, 1, dm, fpscr);
} }
static u32 vfp_double_fcmpz(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) { static u32 vfp_double_fcmpz(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
return vfp_compare(state, dd, 0, VFP_REG_ZERO, fpscr); return vfp_compare(state, dd, 0, VFP_REG_ZERO, fpscr);
} }
static u32 vfp_double_fcmpez(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) { static u32 vfp_double_fcmpez(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
return vfp_compare(state, dd, 1, VFP_REG_ZERO, fpscr); return vfp_compare(state, dd, 1, VFP_REG_ZERO, fpscr);
} }
@ -475,7 +475,7 @@ static u32 vfp_double_fcvts(ARMul_State* state, int sd, int unused, int dm, u32
int tm; int tm;
u32 exceptions = 0; u32 exceptions = 0;
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
exceptions |= vfp_double_unpack(&vdm, vfp_get_double(state, dm), fpscr); exceptions |= vfp_double_unpack(&vdm, vfp_get_double(state, dm), fpscr);
tm = vfp_double_type(&vdm); tm = vfp_double_type(&vdm);
@ -516,7 +516,7 @@ static u32 vfp_double_fuito(ARMul_State* state, int dd, int unused, int dm, u32
struct vfp_double vdm; struct vfp_double vdm;
u32 m = vfp_get_float(state, dm); u32 m = vfp_get_float(state, dm);
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
vdm.sign = 0; vdm.sign = 0;
vdm.exponent = 1023 + 63 - 1; vdm.exponent = 1023 + 63 - 1;
vdm.significand = (u64)m; vdm.significand = (u64)m;
@ -528,7 +528,7 @@ static u32 vfp_double_fsito(ARMul_State* state, int dd, int unused, int dm, u32
struct vfp_double vdm; struct vfp_double vdm;
u32 m = vfp_get_float(state, dm); u32 m = vfp_get_float(state, dm);
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
vdm.sign = (m & 0x80000000) >> 16; vdm.sign = (m & 0x80000000) >> 16;
vdm.exponent = 1023 + 63 - 1; vdm.exponent = 1023 + 63 - 1;
vdm.significand = vdm.sign ? (~m + 1) : m; vdm.significand = vdm.sign ? (~m + 1) : m;
@ -542,7 +542,7 @@ static u32 vfp_double_ftoui(ARMul_State* state, int sd, int unused, int dm, u32
int rmode = fpscr & FPSCR_RMODE_MASK; int rmode = fpscr & FPSCR_RMODE_MASK;
int tm; int tm;
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
exceptions |= vfp_double_unpack(&vdm, vfp_get_double(state, dm), fpscr); exceptions |= vfp_double_unpack(&vdm, vfp_get_double(state, dm), fpscr);
/* /*
@ -611,7 +611,7 @@ static u32 vfp_double_ftoui(ARMul_State* state, int sd, int unused, int dm, u32
} }
} }
LOG_TRACE(Core_ARM11, "VFP: ftoui: d(s%d)=%08x exceptions=%08x", sd, d, exceptions); LOG_TRACE(Core_ARM, "VFP: ftoui: d(s%d)=%08x exceptions=%08x", sd, d, exceptions);
vfp_put_float(state, d, sd); vfp_put_float(state, d, sd);
@ -619,7 +619,7 @@ static u32 vfp_double_ftoui(ARMul_State* state, int sd, int unused, int dm, u32
} }
static u32 vfp_double_ftouiz(ARMul_State* state, int sd, int unused, int dm, u32 fpscr) { static u32 vfp_double_ftouiz(ARMul_State* state, int sd, int unused, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
return vfp_double_ftoui(state, sd, unused, dm, return vfp_double_ftoui(state, sd, unused, dm,
(fpscr & ~FPSCR_RMODE_MASK) | FPSCR_ROUND_TOZERO); (fpscr & ~FPSCR_RMODE_MASK) | FPSCR_ROUND_TOZERO);
} }
@ -630,7 +630,7 @@ static u32 vfp_double_ftosi(ARMul_State* state, int sd, int unused, int dm, u32
int rmode = fpscr & FPSCR_RMODE_MASK; int rmode = fpscr & FPSCR_RMODE_MASK;
int tm; int tm;
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
exceptions |= vfp_double_unpack(&vdm, vfp_get_double(state, dm), fpscr); exceptions |= vfp_double_unpack(&vdm, vfp_get_double(state, dm), fpscr);
vfp_double_dump("VDM", &vdm); vfp_double_dump("VDM", &vdm);
@ -694,7 +694,7 @@ static u32 vfp_double_ftosi(ARMul_State* state, int sd, int unused, int dm, u32
} }
} }
LOG_TRACE(Core_ARM11, "VFP: ftosi: d(s%d)=%08x exceptions=%08x", sd, d, exceptions); LOG_TRACE(Core_ARM, "VFP: ftosi: d(s%d)=%08x exceptions=%08x", sd, d, exceptions);
vfp_put_float(state, (s32)d, sd); vfp_put_float(state, (s32)d, sd);
@ -702,7 +702,7 @@ static u32 vfp_double_ftosi(ARMul_State* state, int sd, int unused, int dm, u32
} }
static u32 vfp_double_ftosiz(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) { static u32 vfp_double_ftosiz(ARMul_State* state, int dd, int unused, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
return vfp_double_ftosi(state, dd, unused, dm, return vfp_double_ftosi(state, dd, unused, dm,
(fpscr & ~FPSCR_RMODE_MASK) | FPSCR_ROUND_TOZERO); (fpscr & ~FPSCR_RMODE_MASK) | FPSCR_ROUND_TOZERO);
} }
@ -784,7 +784,7 @@ u32 vfp_double_add(struct vfp_double* vdd, struct vfp_double* vdn, struct vfp_do
u64 m_sig; u64 m_sig;
if (vdn->significand & (1ULL << 63) || vdm->significand & (1ULL << 63)) { if (vdn->significand & (1ULL << 63) || vdm->significand & (1ULL << 63)) {
LOG_INFO(Core_ARM11, "VFP: bad FP values in %s", __func__); LOG_INFO(Core_ARM, "VFP: bad FP values in %s", __func__);
vfp_double_dump("VDN", vdn); vfp_double_dump("VDN", vdn);
vfp_double_dump("VDM", vdm); vfp_double_dump("VDM", vdm);
} }
@ -849,7 +849,7 @@ u32 vfp_double_multiply(struct vfp_double* vdd, struct vfp_double* vdn, struct v
*/ */
if (vdn->exponent < vdm->exponent) { if (vdn->exponent < vdm->exponent) {
std::swap(vdm, vdn); std::swap(vdm, vdn);
LOG_TRACE(Core_ARM11, "VFP: swapping M <-> N"); LOG_TRACE(Core_ARM, "VFP: swapping M <-> N");
} }
vdd->sign = vdn->sign ^ vdm->sign; vdd->sign = vdn->sign ^ vdm->sign;
@ -931,7 +931,7 @@ static u32 vfp_double_multiply_accumulate(ARMul_State* state, int dd, int dn, in
* sd = sd + (sn * sm) * sd = sd + (sn * sm)
*/ */
static u32 vfp_double_fmac(ARMul_State* state, int dd, int dn, int dm, u32 fpscr) { static u32 vfp_double_fmac(ARMul_State* state, int dd, int dn, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
return vfp_double_multiply_accumulate(state, dd, dn, dm, fpscr, 0, "fmac"); return vfp_double_multiply_accumulate(state, dd, dn, dm, fpscr, 0, "fmac");
} }
@ -939,7 +939,7 @@ static u32 vfp_double_fmac(ARMul_State* state, int dd, int dn, int dm, u32 fpscr
* sd = sd - (sn * sm) * sd = sd - (sn * sm)
*/ */
static u32 vfp_double_fnmac(ARMul_State* state, int dd, int dn, int dm, u32 fpscr) { static u32 vfp_double_fnmac(ARMul_State* state, int dd, int dn, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
return vfp_double_multiply_accumulate(state, dd, dn, dm, fpscr, NEG_MULTIPLY, "fnmac"); return vfp_double_multiply_accumulate(state, dd, dn, dm, fpscr, NEG_MULTIPLY, "fnmac");
} }
@ -947,7 +947,7 @@ static u32 vfp_double_fnmac(ARMul_State* state, int dd, int dn, int dm, u32 fpsc
* sd = -sd + (sn * sm) * sd = -sd + (sn * sm)
*/ */
static u32 vfp_double_fmsc(ARMul_State* state, int dd, int dn, int dm, u32 fpscr) { static u32 vfp_double_fmsc(ARMul_State* state, int dd, int dn, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
return vfp_double_multiply_accumulate(state, dd, dn, dm, fpscr, NEG_SUBTRACT, "fmsc"); return vfp_double_multiply_accumulate(state, dd, dn, dm, fpscr, NEG_SUBTRACT, "fmsc");
} }
@ -955,7 +955,7 @@ static u32 vfp_double_fmsc(ARMul_State* state, int dd, int dn, int dm, u32 fpscr
* sd = -sd - (sn * sm) * sd = -sd - (sn * sm)
*/ */
static u32 vfp_double_fnmsc(ARMul_State* state, int dd, int dn, int dm, u32 fpscr) { static u32 vfp_double_fnmsc(ARMul_State* state, int dd, int dn, int dm, u32 fpscr) {
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
return vfp_double_multiply_accumulate(state, dd, dn, dm, fpscr, NEG_SUBTRACT | NEG_MULTIPLY, return vfp_double_multiply_accumulate(state, dd, dn, dm, fpscr, NEG_SUBTRACT | NEG_MULTIPLY,
"fnmsc"); "fnmsc");
} }
@ -967,7 +967,7 @@ static u32 vfp_double_fmul(ARMul_State* state, int dd, int dn, int dm, u32 fpscr
struct vfp_double vdd, vdn, vdm; struct vfp_double vdd, vdn, vdm;
u32 exceptions = 0; u32 exceptions = 0;
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
exceptions |= vfp_double_unpack(&vdn, vfp_get_double(state, dn), fpscr); exceptions |= vfp_double_unpack(&vdn, vfp_get_double(state, dn), fpscr);
if (vdn.exponent == 0 && vdn.significand) if (vdn.exponent == 0 && vdn.significand)
vfp_double_normalise_denormal(&vdn); vfp_double_normalise_denormal(&vdn);
@ -987,7 +987,7 @@ static u32 vfp_double_fnmul(ARMul_State* state, int dd, int dn, int dm, u32 fpsc
struct vfp_double vdd, vdn, vdm; struct vfp_double vdd, vdn, vdm;
u32 exceptions = 0; u32 exceptions = 0;
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
exceptions |= vfp_double_unpack(&vdn, vfp_get_double(state, dn), fpscr); exceptions |= vfp_double_unpack(&vdn, vfp_get_double(state, dn), fpscr);
if (vdn.exponent == 0 && vdn.significand) if (vdn.exponent == 0 && vdn.significand)
vfp_double_normalise_denormal(&vdn); vfp_double_normalise_denormal(&vdn);
@ -1009,7 +1009,7 @@ static u32 vfp_double_fadd(ARMul_State* state, int dd, int dn, int dm, u32 fpscr
struct vfp_double vdd, vdn, vdm; struct vfp_double vdd, vdn, vdm;
u32 exceptions = 0; u32 exceptions = 0;
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
exceptions |= vfp_double_unpack(&vdn, vfp_get_double(state, dn), fpscr); exceptions |= vfp_double_unpack(&vdn, vfp_get_double(state, dn), fpscr);
if (vdn.exponent == 0 && vdn.significand) if (vdn.exponent == 0 && vdn.significand)
vfp_double_normalise_denormal(&vdn); vfp_double_normalise_denormal(&vdn);
@ -1030,7 +1030,7 @@ static u32 vfp_double_fsub(ARMul_State* state, int dd, int dn, int dm, u32 fpscr
struct vfp_double vdd, vdn, vdm; struct vfp_double vdd, vdn, vdm;
u32 exceptions = 0; u32 exceptions = 0;
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
exceptions |= vfp_double_unpack(&vdn, vfp_get_double(state, dn), fpscr); exceptions |= vfp_double_unpack(&vdn, vfp_get_double(state, dn), fpscr);
if (vdn.exponent == 0 && vdn.significand) if (vdn.exponent == 0 && vdn.significand)
vfp_double_normalise_denormal(&vdn); vfp_double_normalise_denormal(&vdn);
@ -1057,7 +1057,7 @@ static u32 vfp_double_fdiv(ARMul_State* state, int dd, int dn, int dm, u32 fpscr
u32 exceptions = 0; u32 exceptions = 0;
int tm, tn; int tm, tn;
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
exceptions |= vfp_double_unpack(&vdn, vfp_get_double(state, dn), fpscr); exceptions |= vfp_double_unpack(&vdn, vfp_get_double(state, dn), fpscr);
exceptions |= vfp_double_unpack(&vdm, vfp_get_double(state, dm), fpscr); exceptions |= vfp_double_unpack(&vdm, vfp_get_double(state, dm), fpscr);
@ -1175,7 +1175,7 @@ u32 vfp_double_cpdo(ARMul_State* state, u32 inst, u32 fpscr) {
unsigned int vecitr, veclen, vecstride; unsigned int vecitr, veclen, vecstride;
struct op* fop; struct op* fop;
LOG_TRACE(Core_ARM11, "In %s", __FUNCTION__); LOG_TRACE(Core_ARM, "In %s", __FUNCTION__);
vecstride = (1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK)); vecstride = (1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK));
fop = (op == FOP_EXT) ? &fops_ext[FEXT_TO_IDX(inst)] : &fops[FOP_TO_IDX(op)]; fop = (op == FOP_EXT) ? &fops_ext[FEXT_TO_IDX(inst)] : &fops[FOP_TO_IDX(op)];
@ -1206,7 +1206,7 @@ u32 vfp_double_cpdo(ARMul_State* state, u32 inst, u32 fpscr) {
else else
veclen = fpscr & FPSCR_LENGTH_MASK; veclen = fpscr & FPSCR_LENGTH_MASK;
LOG_TRACE(Core_ARM11, "VFP: vecstride=%u veclen=%u", vecstride, LOG_TRACE(Core_ARM, "VFP: vecstride=%u veclen=%u", vecstride,
(veclen >> FPSCR_LENGTH_BIT) + 1); (veclen >> FPSCR_LENGTH_BIT) + 1);
if (!fop->fn) { if (!fop->fn) {
@ -1220,14 +1220,14 @@ u32 vfp_double_cpdo(ARMul_State* state, u32 inst, u32 fpscr) {
type = (fop->flags & OP_SD) ? 's' : 'd'; type = (fop->flags & OP_SD) ? 's' : 'd';
if (op == FOP_EXT) if (op == FOP_EXT)
LOG_TRACE(Core_ARM11, "VFP: itr%d (%c%u) = op[%u] (d%u)", vecitr >> FPSCR_LENGTH_BIT, LOG_TRACE(Core_ARM, "VFP: itr%d (%c%u) = op[%u] (d%u)", vecitr >> FPSCR_LENGTH_BIT,
type, dest, dn, dm); type, dest, dn, dm);
else else
LOG_TRACE(Core_ARM11, "VFP: itr%d (%c%u) = (d%u) op[%u] (d%u)", LOG_TRACE(Core_ARM, "VFP: itr%d (%c%u) = (d%u) op[%u] (d%u)",
vecitr >> FPSCR_LENGTH_BIT, type, dest, dn, FOP_TO_IDX(op), dm); vecitr >> FPSCR_LENGTH_BIT, type, dest, dn, FOP_TO_IDX(op), dm);
except = fop->fn(state, dest, dn, dm, fpscr); except = fop->fn(state, dest, dn, dm, fpscr);
LOG_TRACE(Core_ARM11, "VFP: itr%d: exceptions=%08x", vecitr >> FPSCR_LENGTH_BIT, except); LOG_TRACE(Core_ARM, "VFP: itr%d: exceptions=%08x", vecitr >> FPSCR_LENGTH_BIT, except);
exceptions |= except & ~VFP_NAN_FLAG; exceptions |= except & ~VFP_NAN_FLAG;

50
src/core/arm/skyeye_common/vfp/vfpsingle.cpp
View File

@ -65,7 +65,7 @@ static struct vfp_single vfp_single_default_qnan = {
}; };
static void vfp_single_dump(const char* str, struct vfp_single* s) { static void vfp_single_dump(const char* str, struct vfp_single* s) {
LOG_TRACE(Core_ARM11, "%s: sign=%d exponent=%d significand=%08x", str, s->sign != 0, LOG_TRACE(Core_ARM, "%s: sign=%d exponent=%d significand=%08x", str, s->sign != 0,
s->exponent, s->significand); s->exponent, s->significand);
} }
@ -167,7 +167,7 @@ u32 vfp_single_normaliseround(ARMul_State* state, int sd, struct vfp_single* vs,
} else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vs->sign != 0)) } else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vs->sign != 0))
incr = (1 << (VFP_SINGLE_LOW_BITS + 1)) - 1; incr = (1 << (VFP_SINGLE_LOW_BITS + 1)) - 1;
LOG_TRACE(Core_ARM11, "rounding increment = 0x%08x", incr); LOG_TRACE(Core_ARM, "rounding increment = 0x%08x", incr);
/* /*
* Is our rounding going to overflow? * Is our rounding going to overflow?
@ -222,7 +222,7 @@ pack:
vfp_single_dump("pack: final", vs); vfp_single_dump("pack: final", vs);
{ {
s32 d = vfp_single_pack(vs); s32 d = vfp_single_pack(vs);
LOG_TRACE(Core_ARM11, "%s: d(s%d)=%08x exceptions=%08x", func, sd, d, exceptions); LOG_TRACE(Core_ARM, "%s: d(s%d)=%08x exceptions=%08x", func, sd, d, exceptions);
vfp_put_float(state, d, sd); vfp_put_float(state, d, sd);
} }
@ -305,7 +305,7 @@ u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand) {
u32 z, a; u32 z, a;
if ((significand & 0xc0000000) != 0x40000000) { if ((significand & 0xc0000000) != 0x40000000) {
LOG_TRACE(Core_ARM11, "invalid significand"); LOG_TRACE(Core_ARM, "invalid significand");
} }
a = significand << 1; a = significand << 1;
@ -395,7 +395,7 @@ static u32 vfp_single_fsqrt(ARMul_State* state, int sd, int unused, s32 m, u32 f
term = (u64)vsd.significand * vsd.significand; term = (u64)vsd.significand * vsd.significand;
rem = ((u64)vsm.significand << 32) - term; rem = ((u64)vsm.significand << 32) - term;
LOG_TRACE(Core_ARM11, "term=%016" PRIx64 "rem=%016" PRIx64, term, rem); LOG_TRACE(Core_ARM, "term=%016" PRIx64 "rem=%016" PRIx64, term, rem);
while (rem < 0) { while (rem < 0) {
vsd.significand -= 1; vsd.significand -= 1;
@ -634,7 +634,7 @@ static u32 vfp_single_ftoui(ARMul_State* state, int sd, int unused, s32 m, u32 f
} }
} }
LOG_TRACE(Core_ARM11, "ftoui: d(s%d)=%08x exceptions=%08x", sd, d, exceptions); LOG_TRACE(Core_ARM, "ftoui: d(s%d)=%08x exceptions=%08x", sd, d, exceptions);
vfp_put_float(state, d, sd); vfp_put_float(state, d, sd);
@ -715,7 +715,7 @@ static u32 vfp_single_ftosi(ARMul_State* state, int sd, int unused, s32 m, u32 f
} }
} }
LOG_TRACE(Core_ARM11, "ftosi: d(s%d)=%08x exceptions=%08x", sd, d, exceptions); LOG_TRACE(Core_ARM, "ftosi: d(s%d)=%08x exceptions=%08x", sd, d, exceptions);
vfp_put_float(state, (s32)d, sd); vfp_put_float(state, (s32)d, sd);
@ -802,7 +802,7 @@ static u32 vfp_single_add(struct vfp_single* vsd, struct vfp_single* vsn, struct
u32 exp_diff, m_sig; u32 exp_diff, m_sig;
if (vsn->significand & 0x80000000 || vsm->significand & 0x80000000) { if (vsn->significand & 0x80000000 || vsm->significand & 0x80000000) {
LOG_WARNING(Core_ARM11, "bad FP values"); LOG_WARNING(Core_ARM, "bad FP values");
vfp_single_dump("VSN", vsn); vfp_single_dump("VSN", vsn);
vfp_single_dump("VSM", vsm); vfp_single_dump("VSM", vsm);
} }
@ -867,7 +867,7 @@ static u32 vfp_single_multiply(struct vfp_single* vsd, struct vfp_single* vsn,
*/ */
if (vsn->exponent < vsm->exponent) { if (vsn->exponent < vsm->exponent) {
std::swap(vsm, vsn); std::swap(vsm, vsn);
LOG_TRACE(Core_ARM11, "swapping M <-> N"); LOG_TRACE(Core_ARM, "swapping M <-> N");
} }
vsd->sign = vsn->sign ^ vsm->sign; vsd->sign = vsn->sign ^ vsm->sign;
@ -919,7 +919,7 @@ static u32 vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s3
s32 v; s32 v;
v = vfp_get_float(state, sn); v = vfp_get_float(state, sn);
LOG_TRACE(Core_ARM11, "s%u = %08x", sn, v); LOG_TRACE(Core_ARM, "s%u = %08x", sn, v);
exceptions |= vfp_single_unpack(&vsn, v, fpscr); exceptions |= vfp_single_unpack(&vsn, v, fpscr);
if (vsn.exponent == 0 && vsn.significand) if (vsn.exponent == 0 && vsn.significand)
vfp_single_normalise_denormal(&vsn); vfp_single_normalise_denormal(&vsn);
@ -934,7 +934,7 @@ static u32 vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s3
vsp.sign = vfp_sign_negate(vsp.sign); vsp.sign = vfp_sign_negate(vsp.sign);
v = vfp_get_float(state, sd); v = vfp_get_float(state, sd);
LOG_TRACE(Core_ARM11, "s%u = %08x", sd, v); LOG_TRACE(Core_ARM, "s%u = %08x", sd, v);
exceptions |= vfp_single_unpack(&vsn, v, fpscr); exceptions |= vfp_single_unpack(&vsn, v, fpscr);
if (vsn.exponent == 0 && vsn.significand != 0) if (vsn.exponent == 0 && vsn.significand != 0)
vfp_single_normalise_denormal(&vsn); vfp_single_normalise_denormal(&vsn);
@ -955,7 +955,7 @@ static u32 vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s3
* sd = sd + (sn * sm) * sd = sd + (sn * sm)
*/ */
static u32 vfp_single_fmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) { static u32 vfp_single_fmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) {
LOG_TRACE(Core_ARM11, "s%u = %08x", sn, sd); LOG_TRACE(Core_ARM, "s%u = %08x", sn, sd);
return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, 0, "fmac"); return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, 0, "fmac");
} }
@ -964,7 +964,7 @@ static u32 vfp_single_fmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
*/ */
static u32 vfp_single_fnmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) { static u32 vfp_single_fnmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) {
// TODO: this one has its arguments inverted, investigate. // TODO: this one has its arguments inverted, investigate.
LOG_TRACE(Core_ARM11, "s%u = %08x", sd, sn); LOG_TRACE(Core_ARM, "s%u = %08x", sd, sn);
return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_MULTIPLY, "fnmac"); return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_MULTIPLY, "fnmac");
} }
@ -972,7 +972,7 @@ static u32 vfp_single_fnmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr
* sd = -sd + (sn * sm) * sd = -sd + (sn * sm)
*/ */
static u32 vfp_single_fmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) { static u32 vfp_single_fmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) {
LOG_TRACE(Core_ARM11, "s%u = %08x", sn, sd); LOG_TRACE(Core_ARM, "s%u = %08x", sn, sd);
return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT, "fmsc"); return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT, "fmsc");
} }
@ -980,7 +980,7 @@ static u32 vfp_single_fmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
* sd = -sd - (sn * sm) * sd = -sd - (sn * sm)
*/ */
static u32 vfp_single_fnmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) { static u32 vfp_single_fnmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) {
LOG_TRACE(Core_ARM11, "s%u = %08x", sn, sd); LOG_TRACE(Core_ARM, "s%u = %08x", sn, sd);
return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT | NEG_MULTIPLY, return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT | NEG_MULTIPLY,
"fnmsc"); "fnmsc");
} }
@ -993,7 +993,7 @@ static u32 vfp_single_fmul(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
u32 exceptions = 0; u32 exceptions = 0;
s32 n = vfp_get_float(state, sn); s32 n = vfp_get_float(state, sn);
LOG_TRACE(Core_ARM11, "s%u = %08x", sn, n); LOG_TRACE(Core_ARM, "s%u = %08x", sn, n);
exceptions |= vfp_single_unpack(&vsn, n, fpscr); exceptions |= vfp_single_unpack(&vsn, n, fpscr);
if (vsn.exponent == 0 && vsn.significand) if (vsn.exponent == 0 && vsn.significand)
@ -1015,7 +1015,7 @@ static u32 vfp_single_fnmul(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr
u32 exceptions = 0; u32 exceptions = 0;
s32 n = vfp_get_float(state, sn); s32 n = vfp_get_float(state, sn);
LOG_TRACE(Core_ARM11, "s%u = %08x", sn, n); LOG_TRACE(Core_ARM, "s%u = %08x", sn, n);
exceptions |= vfp_single_unpack(&vsn, n, fpscr); exceptions |= vfp_single_unpack(&vsn, n, fpscr);
if (vsn.exponent == 0 && vsn.significand) if (vsn.exponent == 0 && vsn.significand)
@ -1038,7 +1038,7 @@ static u32 vfp_single_fadd(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
u32 exceptions = 0; u32 exceptions = 0;
s32 n = vfp_get_float(state, sn); s32 n = vfp_get_float(state, sn);
LOG_TRACE(Core_ARM11, "s%u = %08x", sn, n); LOG_TRACE(Core_ARM, "s%u = %08x", sn, n);
/* /*
* Unpack and normalise denormals. * Unpack and normalise denormals.
@ -1060,7 +1060,7 @@ static u32 vfp_single_fadd(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
* sd = sn - sm * sd = sn - sm
*/ */
static u32 vfp_single_fsub(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) { static u32 vfp_single_fsub(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr) {
LOG_TRACE(Core_ARM11, "s%u = %08x", sn, sd); LOG_TRACE(Core_ARM, "s%u = %08x", sn, sd);
/* /*
* Subtraction is addition with one sign inverted. Unpack the second operand to perform FTZ if * Subtraction is addition with one sign inverted. Unpack the second operand to perform FTZ if
* necessary, we can't let fadd do this because a denormal in m might get flushed to +0 in FTZ * necessary, we can't let fadd do this because a denormal in m might get flushed to +0 in FTZ
@ -1089,7 +1089,7 @@ static u32 vfp_single_fdiv(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
s32 n = vfp_get_float(state, sn); s32 n = vfp_get_float(state, sn);
int tm, tn; int tm, tn;
LOG_TRACE(Core_ARM11, "s%u = %08x", sn, n); LOG_TRACE(Core_ARM, "s%u = %08x", sn, n);
exceptions |= vfp_single_unpack(&vsn, n, fpscr); exceptions |= vfp_single_unpack(&vsn, n, fpscr);
exceptions |= vfp_single_unpack(&vsm, m, fpscr); exceptions |= vfp_single_unpack(&vsm, m, fpscr);
@ -1229,10 +1229,10 @@ u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr) {
else else
veclen = fpscr & FPSCR_LENGTH_MASK; veclen = fpscr & FPSCR_LENGTH_MASK;
LOG_TRACE(Core_ARM11, "vecstride=%u veclen=%u", vecstride, (veclen >> FPSCR_LENGTH_BIT) + 1); LOG_TRACE(Core_ARM, "vecstride=%u veclen=%u", vecstride, (veclen >> FPSCR_LENGTH_BIT) + 1);
if (!fop->fn) { if (!fop->fn) {
LOG_CRITICAL(Core_ARM11, "could not find single op %d, inst=0x%x@0x%x", FEXT_TO_IDX(inst), LOG_CRITICAL(Core_ARM, "could not find single op %d, inst=0x%x@0x%x", FEXT_TO_IDX(inst),
inst, state->Reg[15]); inst, state->Reg[15]);
Crash(); Crash();
goto invalid; goto invalid;
@ -1245,14 +1245,14 @@ u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr) {
type = (fop->flags & OP_DD) ? 'd' : 's'; type = (fop->flags & OP_DD) ? 'd' : 's';
if (op == FOP_EXT) if (op == FOP_EXT)
LOG_TRACE(Core_ARM11, "itr%d (%c%u) = op[%u] (s%u=%08x)", vecitr >> FPSCR_LENGTH_BIT, LOG_TRACE(Core_ARM, "itr%d (%c%u) = op[%u] (s%u=%08x)", vecitr >> FPSCR_LENGTH_BIT,
type, dest, sn, sm, m); type, dest, sn, sm, m);
else else
LOG_TRACE(Core_ARM11, "itr%d (%c%u) = (s%u) op[%u] (s%u=%08x)", LOG_TRACE(Core_ARM, "itr%d (%c%u) = (s%u) op[%u] (s%u=%08x)",
vecitr >> FPSCR_LENGTH_BIT, type, dest, sn, FOP_TO_IDX(op), sm, m); vecitr >> FPSCR_LENGTH_BIT, type, dest, sn, FOP_TO_IDX(op), sm, m);
except = fop->fn(state, dest, sn, m, fpscr); except = fop->fn(state, dest, sn, m, fpscr);
LOG_TRACE(Core_ARM11, "itr%d: exceptions=%08x", vecitr >> FPSCR_LENGTH_BIT, except); LOG_TRACE(Core_ARM, "itr%d: exceptions=%08x", vecitr >> FPSCR_LENGTH_BIT, except);
exceptions |= except & ~VFP_NAN_FLAG; exceptions |= except & ~VFP_NAN_FLAG;

2
src/core/core.cpp
View File

@ -52,7 +52,7 @@ System::ResultStatus System::RunLoop(int tight_loop) {
// If we don't have a currently active thread then don't execute instructions, // If we don't have a currently active thread then don't execute instructions,
// instead advance to the next event and try to yield to the next thread // instead advance to the next event and try to yield to the next thread
if (Kernel::GetCurrentThread() == nullptr) { if (Kernel::GetCurrentThread() == nullptr) {
LOG_TRACE(Core_ARM11, "Idling"); LOG_TRACE(Core_ARM, "Idling");
CoreTiming::Idle(); CoreTiming::Idle();
CoreTiming::Advance(); CoreTiming::Advance();
PrepareReschedule(); PrepareReschedule();