shader_decode: Use proper primitive names
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2faad9bf23
commit
50195b1704
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@ -325,8 +325,8 @@ private:
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}
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ASSERT(element.second.size() > 0);
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// UNIMPLEMENTED_IF_MSG(element.second.size() > 1,
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// "Multiple input flag modes are not supported in GLSL");
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UNIMPLEMENTED_IF_MSG(element.second.size() > 1,
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"Multiple input flag modes are not supported in GLSL");
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// TODO(bunnei): Use proper number of elements for these
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u32 idx = static_cast<u32>(index) - static_cast<u32>(Attribute::Index::Attribute_0);
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@ -1209,7 +1209,7 @@ private:
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return expr;
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}
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std::string Bra(Operation operation) {
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std::string Branch(Operation operation) {
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const auto target = std::get<ImmediateNode>(*operation[0]);
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code.AddLine(fmt::format("jmp_to = 0x{:x}u;", target.GetValue()));
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code.AddLine("break;");
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@ -1289,7 +1289,7 @@ private:
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return {};
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}
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std::string Kil(Operation operation) {
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std::string Discard(Operation operation) {
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// Enclose "discard" in a conditional, so that GLSL compilation does not complain
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// about unexecuted instructions that may follow this.
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code.AddLine("if (true) {");
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@ -1449,13 +1449,11 @@ private:
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&GLSLDecompiler::F4TextureQueryLod,
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&GLSLDecompiler::F4TexelFetch,
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&GLSLDecompiler::Bra,
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&GLSLDecompiler::PushFlowStack, // Ssy
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&GLSLDecompiler::PushFlowStack, // Brk
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&GLSLDecompiler::PopFlowStack, // Sync
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&GLSLDecompiler::PopFlowStack, // Brk
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&GLSLDecompiler::Branch,
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&GLSLDecompiler::PushFlowStack,
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&GLSLDecompiler::PopFlowStack,
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&GLSLDecompiler::Exit,
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&GLSLDecompiler::Kil,
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&GLSLDecompiler::Discard,
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&GLSLDecompiler::EmitVertex,
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&GLSLDecompiler::EndPrimitive,
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@ -155,8 +155,8 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
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break;
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}
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case OpCode::Id::ST_L: {
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// UNIMPLEMENTED_IF_MSG(instr.st_l.unknown == 0, "ST_L Unhandled mode: {}",
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// static_cast<u32>(instr.st_l.unknown.Value()));
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UNIMPLEMENTED_IF_MSG(instr.st_l.unknown == 0, "ST_L Unhandled mode: {}",
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static_cast<u32>(instr.st_l.unknown.Value()));
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const Node index = Operation(OperationCode::IAdd, NO_PRECISE, GetRegister(instr.gpr8),
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Immediate(static_cast<s32>(instr.smem_imm)));
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@ -54,7 +54,7 @@ u32 ShaderIR::DecodeOther(BasicBlock& bb, u32 pc) {
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UNIMPLEMENTED_IF_MSG(cc != Tegra::Shader::ConditionCode::T, "KIL condition code used: {}",
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static_cast<u32>(cc));
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bb.push_back(Operation(OperationCode::Kil));
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bb.push_back(Operation(OperationCode::Discard));
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break;
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}
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case OpCode::Id::MOV_SYS: {
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@ -79,7 +79,7 @@ u32 ShaderIR::DecodeOther(BasicBlock& bb, u32 pc) {
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"BRA with constant buffers are not implemented");
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const u32 target = pc + instr.bra.GetBranchTarget();
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const Node branch = Operation(OperationCode::Bra, Immediate(target));
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const Node branch = Operation(OperationCode::Branch, Immediate(target));
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const Tegra::Shader::ConditionCode cc = instr.flow_condition_code;
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if (cc != Tegra::Shader::ConditionCode::T) {
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@ -97,7 +97,7 @@ u32 ShaderIR::DecodeOther(BasicBlock& bb, u32 pc) {
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// target of the jump that the SYNC instruction will make. The SSY opcode has a similar
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// structure to the BRA opcode.
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const u32 target = pc + instr.bra.GetBranchTarget();
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bb.push_back(Operation(OperationCode::Ssy, Immediate(target)));
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bb.push_back(Operation(OperationCode::PushFlowStack, Immediate(target)));
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break;
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}
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case OpCode::Id::PBK: {
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@ -108,7 +108,7 @@ u32 ShaderIR::DecodeOther(BasicBlock& bb, u32 pc) {
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// using SYNC on a PBK address will kill the shader execution. We don't emulate this because
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// it's very unlikely a driver will emit such invalid shader.
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const u32 target = pc + instr.bra.GetBranchTarget();
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bb.push_back(Operation(OperationCode::Pbk, Immediate(target)));
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bb.push_back(Operation(OperationCode::PushFlowStack, Immediate(target)));
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break;
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}
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case OpCode::Id::SYNC: {
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@ -117,7 +117,7 @@ u32 ShaderIR::DecodeOther(BasicBlock& bb, u32 pc) {
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static_cast<u32>(cc));
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// The SYNC opcode jumps to the address previously set by the SSY opcode
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bb.push_back(Operation(OperationCode::Sync));
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bb.push_back(Operation(OperationCode::PopFlowStack));
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break;
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}
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case OpCode::Id::BRK: {
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@ -126,7 +126,7 @@ u32 ShaderIR::DecodeOther(BasicBlock& bb, u32 pc) {
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static_cast<u32>(cc));
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// The BRK opcode jumps to the address previously set by the PBK opcode
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bb.push_back(Operation(OperationCode::Brk));
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bb.push_back(Operation(OperationCode::PopFlowStack));
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break;
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}
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case OpCode::Id::IPA: {
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@ -163,13 +163,11 @@ enum class OperationCode {
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F4TextureQueryLod, /// (MetaTexture, float[N] coords) -> float4
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F4TexelFetch, /// (MetaTexture, int[N], int) -> float4
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Bra, /// (uint branch_target) -> void
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Ssy, /// (uint branch_target) -> void
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Pbk, /// (uint branch_target) -> void
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Sync, /// () -> void
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Brk, /// () -> void
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Exit, /// () -> void
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Kil, /// () -> void
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Branch, /// (uint branch_target) -> void
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PushFlowStack, /// (uint branch_target) -> void
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PopFlowStack, /// () -> void
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Exit, /// () -> void
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Discard, /// () -> void
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EmitVertex, /// () -> void
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EndPrimitive, /// () -> void
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