shader: Implement VMAD, VMNMX, VSETP
This commit is contained in:
ameerj
parent
0e1b213fa7
commit
51475e21ba
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@ -127,6 +127,11 @@ add_library(shader_recompiler STATIC
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frontend/maxwell/translate/impl/texture_gather_swizzled.cpp
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frontend/maxwell/translate/impl/texture_gather.cpp
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frontend/maxwell/translate/impl/texture_query.cpp
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frontend/maxwell/translate/impl/video_helper.cpp
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frontend/maxwell/translate/impl/video_helper.h
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frontend/maxwell/translate/impl/video_minimum_maximum.cpp
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frontend/maxwell/translate/impl/video_multiply_add.cpp
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frontend/maxwell/translate/impl/video_set_predicate.cpp
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frontend/maxwell/translate/impl/vote.cpp
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frontend/maxwell/translate/impl/warp_shuffle.cpp
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frontend/maxwell/translate/translate.cpp
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@ -1121,6 +1121,10 @@ U32 IREmitter::UMin(const U32& a, const U32& b) {
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return Inst<U32>(Opcode::UMin32, a, b);
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}
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U32 IREmitter::IMin(const U32& a, const U32& b, bool is_signed) {
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return is_signed ? SMin(a, b) : UMin(a, b);
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}
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U32 IREmitter::SMax(const U32& a, const U32& b) {
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return Inst<U32>(Opcode::SMax32, a, b);
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}
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@ -1129,6 +1133,10 @@ U32 IREmitter::UMax(const U32& a, const U32& b) {
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return Inst<U32>(Opcode::UMax32, a, b);
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}
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U32 IREmitter::IMax(const U32& a, const U32& b, bool is_signed) {
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return is_signed ? SMax(a, b) : UMax(a, b);
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}
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U1 IREmitter::ILessThan(const U32& lhs, const U32& rhs, bool is_signed) {
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return Inst<U1>(is_signed ? Opcode::SLessThan : Opcode::ULessThan, lhs, rhs);
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}
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@ -1267,11 +1275,7 @@ U32U64 IREmitter::ConvertFToU(size_t bitsize, const F16F32F64& value) {
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}
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U32U64 IREmitter::ConvertFToI(size_t bitsize, bool is_signed, const F16F32F64& value) {
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if (is_signed) {
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return ConvertFToS(bitsize, value);
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} else {
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return ConvertFToU(bitsize, value);
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}
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return is_signed ? ConvertFToS(bitsize, value) : ConvertFToU(bitsize, value);
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}
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F16F32F64 IREmitter::ConvertSToF(size_t dest_bitsize, size_t src_bitsize, const Value& value) {
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@ -1360,11 +1364,8 @@ F16F32F64 IREmitter::ConvertUToF(size_t dest_bitsize, size_t src_bitsize, const
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F16F32F64 IREmitter::ConvertIToF(size_t dest_bitsize, size_t src_bitsize, bool is_signed,
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const Value& value) {
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if (is_signed) {
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return ConvertSToF(dest_bitsize, src_bitsize, value);
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} else {
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return ConvertUToF(dest_bitsize, src_bitsize, value);
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}
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return is_signed ? ConvertSToF(dest_bitsize, src_bitsize, value)
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: ConvertUToF(dest_bitsize, src_bitsize, value);
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}
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U32U64 IREmitter::UConvert(size_t result_bitsize, const U32U64& value) {
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@ -196,8 +196,10 @@ public:
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[[nodiscard]] U32 FindUMsb(const U32& value);
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[[nodiscard]] U32 SMin(const U32& a, const U32& b);
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[[nodiscard]] U32 UMin(const U32& a, const U32& b);
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[[nodiscard]] U32 IMin(const U32& a, const U32& b, bool is_signed);
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[[nodiscard]] U32 SMax(const U32& a, const U32& b);
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[[nodiscard]] U32 UMax(const U32& a, const U32& b);
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[[nodiscard]] U32 IMax(const U32& a, const U32& b, bool is_signed);
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[[nodiscard]] U1 ILessThan(const U32& lhs, const U32& rhs, bool is_signed);
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[[nodiscard]] U1 IEqual(const U32U64& lhs, const U32U64& rhs);
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@ -385,14 +385,6 @@ void TranslatorVisitor::VADD(u64) {
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ThrowNotImplemented(Opcode::VADD);
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}
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void TranslatorVisitor::VMAD(u64) {
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ThrowNotImplemented(Opcode::VMAD);
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}
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void TranslatorVisitor::VMNMX(u64) {
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ThrowNotImplemented(Opcode::VMNMX);
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}
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void TranslatorVisitor::VOTE_vtg(u64) {
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ThrowNotImplemented(Opcode::VOTE_vtg);
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}
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@ -400,11 +392,6 @@ void TranslatorVisitor::VOTE_vtg(u64) {
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void TranslatorVisitor::VSET(u64) {
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ThrowNotImplemented(Opcode::VSET);
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}
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void TranslatorVisitor::VSETP(u64) {
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ThrowNotImplemented(Opcode::VSETP);
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}
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void TranslatorVisitor::VSHL(u64) {
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ThrowNotImplemented(Opcode::VSHL);
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}
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@ -0,0 +1,30 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "shader_recompiler/exception.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/video_helper.h"
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namespace Shader::Maxwell {
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IR::U32 ExtractVideoOperandValue(IR::IREmitter& ir, const IR::U32& value, VideoWidth width,
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u32 selector, bool is_signed) {
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switch (width) {
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case VideoWidth::Byte:
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case VideoWidth::Unknown:
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return ir.BitFieldExtract(value, ir.Imm32(selector * 8), ir.Imm32(8), is_signed);
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case VideoWidth::Short:
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return ir.BitFieldExtract(value, ir.Imm32(selector * 16), ir.Imm32(16), is_signed);
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case VideoWidth::Word:
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return value;
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default:
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throw NotImplementedException("Unknown VideoWidth {}", width);
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}
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}
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VideoWidth GetVideoSourceWidth(VideoWidth width, bool is_immediate) {
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// immediates must be 16-bit format.
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return is_immediate ? VideoWidth::Short : width;
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}
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} // namespace Shader::Maxwell
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@ -0,0 +1,23 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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enum class VideoWidth : u64 {
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Byte,
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Unknown,
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Short,
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Word,
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};
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[[nodiscard]] IR::U32 ExtractVideoOperandValue(IR::IREmitter& ir, const IR::U32& value,
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VideoWidth width, u32 selector, bool is_signed);
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[[nodiscard]] VideoWidth GetVideoSourceWidth(VideoWidth width, bool is_immediate);
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} // namespace Shader::Maxwell
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@ -0,0 +1,92 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/common_types.h"
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#include "shader_recompiler/exception.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/video_helper.h"
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namespace Shader::Maxwell {
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namespace {
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enum class VideoMinMaxOps : u64 {
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MRG_16H,
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MRG_16L,
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MRG_8B0,
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MRG_8B2,
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ACC,
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MIN,
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MAX,
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};
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[[nodiscard]] IR::U32 ApplyVideoMinMaxOp(IR::IREmitter& ir, const IR::U32& lhs, const IR::U32& rhs,
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VideoMinMaxOps op, bool is_signed) {
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switch (op) {
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case VideoMinMaxOps::MIN:
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return ir.IMin(lhs, rhs, is_signed);
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case VideoMinMaxOps::MAX:
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return ir.IMax(lhs, rhs, is_signed);
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default:
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throw NotImplementedException("VMNMX op {}", op);
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}
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}
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} // Anonymous namespace
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void TranslatorVisitor::VMNMX(u64 insn) {
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union {
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u64 raw;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<20, 16, u64> src_b_imm;
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BitField<28, 2, u64> src_b_selector;
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BitField<29, 2, VideoWidth> src_b_width;
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BitField<36, 2, u64> src_a_selector;
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BitField<37, 2, VideoWidth> src_a_width;
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BitField<47, 1, u64> cc;
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BitField<48, 1, u64> src_a_sign;
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BitField<49, 1, u64> src_b_sign;
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BitField<50, 1, u64> is_src_b_reg;
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BitField<51, 3, VideoMinMaxOps> op;
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BitField<54, 1, u64> dest_sign;
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BitField<55, 1, u64> sat;
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BitField<56, 1, u64> mx;
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} const vmnmx{insn};
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if (vmnmx.cc != 0) {
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throw NotImplementedException("VMNMX CC");
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}
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if (vmnmx.sat != 0) {
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throw NotImplementedException("VMNMX SAT");
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}
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// Selectors were shown to default to 2 in unit tests
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if (vmnmx.src_a_selector != 2) {
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throw NotImplementedException("VMNMX Selector {}", vmnmx.src_a_selector.Value());
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}
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if (vmnmx.src_b_selector != 2) {
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throw NotImplementedException("VMNMX Selector {}", vmnmx.src_b_selector.Value());
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}
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if (vmnmx.src_a_width != VideoWidth::Word) {
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throw NotImplementedException("VMNMX Source Width {}", vmnmx.src_a_width.Value());
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}
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const bool is_b_imm{vmnmx.is_src_b_reg == 0};
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const IR::U32 src_a{GetReg8(insn)};
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const IR::U32 src_b{is_b_imm ? ir.Imm32(static_cast<u32>(vmnmx.src_b_imm)) : GetReg20(insn)};
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const IR::U32 src_c{GetReg39(insn)};
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const VideoWidth a_width{vmnmx.src_a_width};
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const VideoWidth b_width{GetVideoSourceWidth(vmnmx.src_b_width, is_b_imm)};
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const bool src_a_signed{vmnmx.src_a_sign != 0};
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const bool src_b_signed{vmnmx.src_b_sign != 0};
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const IR::U32 op_a{ExtractVideoOperandValue(ir, src_a, a_width, 0, src_a_signed)};
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const IR::U32 op_b{ExtractVideoOperandValue(ir, src_b, b_width, 0, src_b_signed)};
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// First operation's sign is only dependent on operand b's sign
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const bool op_1_signed{src_b_signed};
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const IR::U32 lhs{vmnmx.mx != 0 ? ir.IMax(op_a, op_b, op_1_signed)
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: ir.IMin(op_a, op_b, op_1_signed)};
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X(vmnmx.dest_reg, ApplyVideoMinMaxOp(ir, lhs, src_c, vmnmx.op, vmnmx.dest_sign != 0));
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}
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} // namespace Shader::Maxwell
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@ -0,0 +1,64 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/common_types.h"
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#include "shader_recompiler/exception.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/video_helper.h"
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namespace Shader::Maxwell {
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void TranslatorVisitor::VMAD(u64 insn) {
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union {
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u64 raw;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<20, 16, u64> src_b_imm;
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BitField<28, 2, u64> src_b_selector;
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BitField<29, 2, VideoWidth> src_b_width;
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BitField<36, 2, u64> src_a_selector;
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BitField<37, 2, VideoWidth> src_a_width;
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BitField<47, 1, u64> cc;
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BitField<48, 1, u64> src_a_sign;
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BitField<49, 1, u64> src_b_sign;
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BitField<50, 1, u64> is_src_b_reg;
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BitField<51, 2, u64> scale;
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BitField<53, 1, u64> src_c_neg;
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BitField<54, 1, u64> src_a_neg;
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BitField<55, 1, u64> sat;
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} const vmad{insn};
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if (vmad.cc != 0) {
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throw NotImplementedException("VMAD CC");
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}
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if (vmad.sat != 0) {
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throw NotImplementedException("VMAD SAT");
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}
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if (vmad.scale != 0) {
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throw NotImplementedException("VMAD SCALE");
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}
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if (vmad.src_a_neg != 0 && vmad.src_c_neg != 0) {
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throw NotImplementedException("VMAD PO");
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}
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if (vmad.src_a_neg != 0 || vmad.src_c_neg != 0) {
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throw NotImplementedException("VMAD NEG");
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}
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const bool is_b_imm{vmad.is_src_b_reg == 0};
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const IR::U32 src_a{GetReg8(insn)};
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const IR::U32 src_b{is_b_imm ? ir.Imm32(static_cast<u32>(vmad.src_b_imm)) : GetReg20(insn)};
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const IR::U32 src_c{GetReg39(insn)};
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const u32 a_selector{static_cast<u32>(vmad.src_a_selector)};
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// Immediate values can't have a selector
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const u32 b_selector{is_b_imm ? 0U : static_cast<u32>(vmad.src_b_selector)};
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const VideoWidth a_width{vmad.src_a_width};
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const VideoWidth b_width{GetVideoSourceWidth(vmad.src_b_width, is_b_imm)};
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const bool src_a_signed{vmad.src_a_sign != 0};
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const bool src_b_signed{vmad.src_b_sign != 0};
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const IR::U32 op_a{ExtractVideoOperandValue(ir, src_a, a_width, a_selector, src_a_signed)};
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const IR::U32 op_b{ExtractVideoOperandValue(ir, src_b, b_width, b_selector, src_b_signed)};
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X(vmad.dest_reg, ir.IAdd(ir.IMul(op_a, op_b), src_c));
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}
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} // namespace Shader::Maxwell
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@ -0,0 +1,92 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/common_types.h"
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#include "shader_recompiler/exception.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/common_funcs.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/video_helper.h"
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namespace Shader::Maxwell {
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namespace {
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enum class VsetpCompareOp : u64 {
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False = 0,
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LessThan,
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Equal,
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LessThanEqual,
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GreaterThan = 16,
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NotEqual,
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GreaterThanEqual,
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True,
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};
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CompareOp VsetpToShaderCompareOp(VsetpCompareOp op) {
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switch (op) {
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case VsetpCompareOp::False:
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return CompareOp::False;
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case VsetpCompareOp::LessThan:
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return CompareOp::LessThan;
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case VsetpCompareOp::Equal:
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return CompareOp::Equal;
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case VsetpCompareOp::LessThanEqual:
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return CompareOp::LessThanEqual;
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case VsetpCompareOp::GreaterThan:
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return CompareOp::GreaterThan;
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case VsetpCompareOp::NotEqual:
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return CompareOp::NotEqual;
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case VsetpCompareOp::GreaterThanEqual:
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return CompareOp::GreaterThanEqual;
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case VsetpCompareOp::True:
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return CompareOp::True;
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default:
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throw NotImplementedException("Invalid compare op {}", op);
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}
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}
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} // Anonymous namespace
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void TranslatorVisitor::VSETP(u64 insn) {
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union {
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u64 raw;
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BitField<0, 3, IR::Pred> dest_pred_b;
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BitField<3, 3, IR::Pred> dest_pred_a;
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BitField<20, 16, u64> src_b_imm;
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BitField<28, 2, u64> src_b_selector;
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BitField<29, 2, VideoWidth> src_b_width;
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BitField<36, 2, u64> src_a_selector;
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BitField<37, 2, VideoWidth> src_a_width;
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BitField<39, 3, IR::Pred> bop_pred;
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BitField<42, 1, u64> neg_bop_pred;
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BitField<43, 5, VsetpCompareOp> compare_op;
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BitField<45, 2, BooleanOp> bop;
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BitField<48, 1, u64> src_a_sign;
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BitField<49, 1, u64> src_b_sign;
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BitField<50, 1, u64> is_src_b_reg;
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} const vsetp{insn};
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const bool is_b_imm{vsetp.is_src_b_reg == 0};
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const IR::U32 src_a{GetReg8(insn)};
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const IR::U32 src_b{is_b_imm ? ir.Imm32(static_cast<u32>(vsetp.src_b_imm)) : GetReg20(insn)};
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const u32 a_selector{static_cast<u32>(vsetp.src_a_selector)};
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const u32 b_selector{is_b_imm ? 0U : static_cast<u32>(vsetp.src_b_selector)};
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const VideoWidth a_width{vsetp.src_a_width};
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const VideoWidth b_width{GetVideoSourceWidth(vsetp.src_b_width, is_b_imm)};
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const bool src_a_signed{vsetp.src_a_sign != 0};
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const bool src_b_signed{vsetp.src_b_sign != 0};
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const IR::U32 op_a{ExtractVideoOperandValue(ir, src_a, a_width, a_selector, src_a_signed)};
|
||||
const IR::U32 op_b{ExtractVideoOperandValue(ir, src_b, b_width, a_selector, src_b_signed)};
|
||||
|
||||
// Compare operation's sign is only dependent on operand b's sign
|
||||
const bool compare_signed{src_b_signed};
|
||||
const CompareOp compare_op{VsetpToShaderCompareOp(vsetp.compare_op)};
|
||||
const IR::U1 comparison{IntegerCompare(ir, op_a, op_b, compare_op, compare_signed)};
|
||||
const IR::U1 bop_pred{ir.GetPred(vsetp.bop_pred, vsetp.neg_bop_pred != 0)};
|
||||
const IR::U1 result_a{PredicateCombine(ir, comparison, bop_pred, vsetp.bop)};
|
||||
const IR::U1 result_b{PredicateCombine(ir, ir.LogicalNot(comparison), bop_pred, vsetp.bop)};
|
||||
ir.SetPred(vsetp.dest_pred_a, result_a);
|
||||
ir.SetPred(vsetp.dest_pred_b, result_b);
|
||||
}
|
||||
|
||||
} // namespace Shader::Maxwell
|
||||
Reference in New Issue