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12b4c9c04c
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58fec43768
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@ -321,11 +321,12 @@ Id EmitGetAttribute(EmitContext& ctx, IR::Attribute attr, Id vertex) {
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case IR::Attribute::PositionY:
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case IR::Attribute::PositionY:
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case IR::Attribute::PositionZ:
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case IR::Attribute::PositionZ:
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case IR::Attribute::PositionW:
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case IR::Attribute::PositionW:
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return ctx.OpLoad(ctx.F32[1], ctx.need_input_position_indirect ?
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return ctx.OpLoad(
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AttrPointer(ctx, ctx.input_f32, vertex, ctx.input_position,
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ctx.F32[1],
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ctx.u32_zero_value, ctx.Const(element))
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ctx.need_input_position_indirect
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: AttrPointer(ctx, ctx.input_f32, vertex, ctx.input_position,
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? AttrPointer(ctx, ctx.input_f32, vertex, ctx.input_position, ctx.u32_zero_value,
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ctx.Const(element)));
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ctx.Const(element))
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: AttrPointer(ctx, ctx.input_f32, vertex, ctx.input_position, ctx.Const(element)));
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case IR::Attribute::InstanceId:
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case IR::Attribute::InstanceId:
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if (ctx.profile.support_vertex_instance_id) {
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if (ctx.profile.support_vertex_instance_id) {
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return ctx.OpBitcast(ctx.F32[1], ctx.OpLoad(ctx.U32[1], ctx.instance_id));
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return ctx.OpBitcast(ctx.F32[1], ctx.OpLoad(ctx.U32[1], ctx.instance_id));
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@ -729,7 +729,7 @@ void EmitContext::DefineAttributeMemAccess(const Info& info) {
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else
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else
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return OpAccessChain(input_f32, input_position, u32_zero_value,
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return OpAccessChain(input_f32, input_position, u32_zero_value,
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masked_index);
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masked_index);
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} else {
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} else {
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if (is_array)
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if (is_array)
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return OpAccessChain(input_f32, input_position, vertex, masked_index);
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return OpAccessChain(input_f32, input_position, vertex, masked_index);
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else
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else
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@ -1390,7 +1390,8 @@ void EmitContext::DefineInputs(const IR::Program& program) {
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static_cast<unsigned>(spv::BuiltIn::Position));
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static_cast<unsigned>(spv::BuiltIn::Position));
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Decorate(input_position_struct, spv::Decoration::Block);
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Decorate(input_position_struct, spv::Decoration::Block);
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} else {
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} else {
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const spv::BuiltIn built_in{is_fragment ? spv::BuiltIn::FragCoord : spv::BuiltIn::Position};
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const spv::BuiltIn built_in{is_fragment ? spv::BuiltIn::FragCoord
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: spv::BuiltIn::Position};
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input_position = DefineInput(*this, F32[4], true, built_in);
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input_position = DefineInput(*this, F32[4], true, built_in);
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if (profile.support_geometry_shader_passthrough) {
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if (profile.support_geometry_shader_passthrough) {
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@ -172,7 +172,10 @@ std::map<IR::Attribute, IR::Attribute> GenerateLegacyToGenericMappings(
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return mapping;
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return mapping;
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}
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}
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void EmitGeometryPassthrough(IR::IREmitter& ir, const IR::Program& program, const Shader::VaryingState &passthrough_mask, bool passthrough_position, std::optional<IR::Attribute> passthrough_layer_attr) {
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void EmitGeometryPassthrough(IR::IREmitter& ir, const IR::Program& program,
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const Shader::VaryingState& passthrough_mask,
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bool passthrough_position,
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std::optional<IR::Attribute> passthrough_layer_attr) {
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for (u32 i = 0; i < program.output_vertices; i++) {
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for (u32 i = 0; i < program.output_vertices; i++) {
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// Assign generics from input
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// Assign generics from input
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for (u32 j = 0; j < 32; j++) {
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for (u32 j = 0; j < 32; j++) {
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@ -198,7 +201,8 @@ void EmitGeometryPassthrough(IR::IREmitter& ir, const IR::Program& program, cons
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if (passthrough_layer_attr) {
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if (passthrough_layer_attr) {
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// Assign layer
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// Assign layer
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ir.SetAttribute(IR::Attribute::Layer, ir.GetAttribute(*passthrough_layer_attr), ir.Imm32(0));
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ir.SetAttribute(IR::Attribute::Layer, ir.GetAttribute(*passthrough_layer_attr),
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ir.Imm32(0));
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}
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}
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// Emit vertex
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// Emit vertex
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@ -209,21 +213,23 @@ void EmitGeometryPassthrough(IR::IREmitter& ir, const IR::Program& program, cons
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u32 GetOutputTopologyVertices(OutputTopology output_topology) {
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u32 GetOutputTopologyVertices(OutputTopology output_topology) {
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switch (output_topology) {
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switch (output_topology) {
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case OutputTopology::PointList:
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case OutputTopology::PointList:
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return 1;
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return 1;
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case OutputTopology::LineStrip:
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case OutputTopology::LineStrip:
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return 2;
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return 2;
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default:
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default:
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return 3;
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return 3;
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}
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}
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}
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}
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void LowerGeometryPassthrough(const IR::Program& program, const HostTranslateInfo& host_info) {
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void LowerGeometryPassthrough(const IR::Program& program, const HostTranslateInfo& host_info) {
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for (IR::Block *const block : program.blocks) {
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for (IR::Block* const block : program.blocks) {
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for (IR::Inst &inst : block->Instructions()) {
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for (IR::Inst& inst : block->Instructions()) {
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if (inst.GetOpcode() == IR::Opcode::Epilogue) {
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if (inst.GetOpcode() == IR::Opcode::Epilogue) {
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IR::IREmitter ir{*block, IR::Block::InstructionList::s_iterator_to(inst)};
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IR::IREmitter ir{*block, IR::Block::InstructionList::s_iterator_to(inst)};
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EmitGeometryPassthrough(ir, program, program.info.passthrough, program.info.passthrough.AnyComponent(IR::Attribute::PositionX), {});
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EmitGeometryPassthrough(
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ir, program, program.info.passthrough,
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program.info.passthrough.AnyComponent(IR::Attribute::PositionX), {});
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}
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}
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}
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}
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}
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}
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@ -407,7 +413,6 @@ IR::Program GenerateGeometryPassthrough(ObjectPool<IR::Inst>& inst_pool,
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program.output_topology = output_topology;
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program.output_topology = output_topology;
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program.output_vertices = GetOutputTopologyVertices(output_topology);
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program.output_vertices = GetOutputTopologyVertices(output_topology);
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program.is_geometry_passthrough = false;
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program.is_geometry_passthrough = false;
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program.info.loads.mask = source_program.info.stores.mask;
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program.info.loads.mask = source_program.info.stores.mask;
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program.info.stores.mask = source_program.info.stores.mask;
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program.info.stores.mask = source_program.info.stores.mask;
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@ -420,7 +425,8 @@ IR::Program GenerateGeometryPassthrough(ObjectPool<IR::Inst>& inst_pool,
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node.data.block = current_block;
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node.data.block = current_block;
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IR::IREmitter ir{*current_block};
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IR::IREmitter ir{*current_block};
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EmitGeometryPassthrough(ir, program, program.info.stores, true, source_program.info.emulated_layer);
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EmitGeometryPassthrough(ir, program, program.info.stores, true,
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source_program.info.emulated_layer);
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IR::Block* return_block{block_pool.Create(inst_pool)};
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IR::Block* return_block{block_pool.Create(inst_pool)};
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IR::IREmitter{*return_block}.Epilogue();
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IR::IREmitter{*return_block}.Epilogue();
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@ -15,8 +15,9 @@ struct HostTranslateInfo {
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bool needs_demote_reorder{}; ///< True when the device needs DemoteToHelperInvocation reordered
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bool needs_demote_reorder{}; ///< True when the device needs DemoteToHelperInvocation reordered
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bool support_snorm_render_buffer{}; ///< True when the device supports SNORM render buffers
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bool support_snorm_render_buffer{}; ///< True when the device supports SNORM render buffers
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bool support_viewport_index_layer{}; ///< True when the device supports gl_Layer in VS
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bool support_viewport_index_layer{}; ///< True when the device supports gl_Layer in VS
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u32 min_ssbo_alignment{}; ///< Minimum alignment supported by the device for SSBOs
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u32 min_ssbo_alignment{}; ///< Minimum alignment supported by the device for SSBOs
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bool support_geometry_shader_passthrough{}; ///< True when the device supports geometry passthrough shaders
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bool support_geometry_shader_passthrough{}; ///< True when the device supports geometry
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///< passthrough shaders
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};
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};
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} // namespace Shader
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} // namespace Shader
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@ -538,7 +538,8 @@ void GlobalMemoryToStorageBufferPass(IR::Program& program, const HostTranslateIn
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const IR::U32 index{IR::Value{static_cast<u32>(info.set.index_of(it))}};
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const IR::U32 index{IR::Value{static_cast<u32>(info.set.index_of(it))}};
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IR::Block* const block{storage_inst.block};
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IR::Block* const block{storage_inst.block};
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IR::Inst* const inst{storage_inst.inst};
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IR::Inst* const inst{storage_inst.inst};
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const IR::U32 offset{StorageOffset(*block, *inst, storage_buffer, host_info.min_ssbo_alignment)};
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const IR::U32 offset{
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StorageOffset(*block, *inst, storage_buffer, host_info.min_ssbo_alignment)};
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Replace(*block, *inst, index, offset);
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Replace(*block, *inst, index, offset);
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}
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}
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}
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}
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@ -1941,7 +1941,8 @@ typename BufferCache<P>::Binding BufferCache<P>::StorageBufferBinding(GPUVAddr s
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const u32 alignment = runtime.GetStorageBufferAlignment();
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const u32 alignment = runtime.GetStorageBufferAlignment();
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const GPUVAddr aligned_gpu_addr = Common::AlignDown(gpu_addr, alignment);
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const GPUVAddr aligned_gpu_addr = Common::AlignDown(gpu_addr, alignment);
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const u32 aligned_size = Common::AlignUp(static_cast<u32>(gpu_addr - aligned_gpu_addr) + size, alignment);
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const u32 aligned_size =
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Common::AlignUp(static_cast<u32>(gpu_addr - aligned_gpu_addr) + size, alignment);
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const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(aligned_gpu_addr);
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const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(aligned_gpu_addr);
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if (!cpu_addr || size == 0) {
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if (!cpu_addr || size == 0) {
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