shader_ir: Add register getter
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@ -39,6 +39,13 @@ Node ShaderIR::Immediate(u32 value) {
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return StoreNode(ImmediateNode(value));
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}
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Node ShaderIR::GetRegister(Register reg) {
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if (reg != Register::ZeroIndex) {
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used_registers.insert(static_cast<u32>(reg));
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}
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return StoreNode(GprNode(reg));
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}
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Node ShaderIR::GetImmediate19(Instruction instr) {
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return Immediate(instr.alu.GetImm20_19());
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}
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@ -610,6 +610,8 @@ private:
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return Immediate(*reinterpret_cast<const u32*>(&value));
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}
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/// Generates a node for a passed register.
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Node GetRegister(Tegra::Shader::Register reg);
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/// Generates a node representing a 19-bit immediate value
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Node GetImmediate19(Tegra::Shader::Instruction instr);
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/// Generates a node representing a 32-bit immediate value
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