shader_decode: Implement TEXS (F32)
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ReinUsesLisp
parent
c703f0aee4
commit
878672f371
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@ -2,6 +2,8 @@
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <vector>
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "video_core/engines/shader_bytecode.h"
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@ -13,6 +15,24 @@ using Tegra::Shader::Attribute;
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Register;
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using Tegra::Shader::TextureMiscMode;
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using Tegra::Shader::TextureProcessMode;
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using Tegra::Shader::TextureType;
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static std::size_t GetCoordCount(TextureType texture_type) {
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switch (texture_type) {
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case TextureType::Texture1D:
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return 1;
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case TextureType::Texture2D:
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return 2;
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case TextureType::Texture3D:
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case TextureType::TextureCube:
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return 3;
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default:
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UNIMPLEMENTED_MSG("Unhandled texture type: {}", static_cast<u32>(texture_type));
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return 0;
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}
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}
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u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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@ -82,6 +102,27 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
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break;
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}
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case OpCode::Id::TEXS: {
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Tegra::Shader::TextureType texture_type{instr.texs.GetTextureType()};
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const bool is_array{instr.texs.IsArrayTexture()};
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const bool depth_compare = instr.texs.UsesMiscMode(TextureMiscMode::DC);
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const auto process_mode = instr.texs.GetTextureProcessMode();
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if (instr.texs.UsesMiscMode(TextureMiscMode::NODEP)) {
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LOG_WARNING(HW_GPU, "TEXS.NODEP implementation is incomplete");
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}
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const Node texture =
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GetTexsCode(instr, texture_type, process_mode, depth_compare, is_array);
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if (instr.texs.fp32_flag) {
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WriteTexsInstructionFloat(bb, instr, texture);
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} else {
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UNIMPLEMENTED();
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// WriteTexsInstructionHalfFloat(bb, instr, texture);
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}
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break;
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled memory instruction: {}", opcode->get().GetName());
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}
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@ -89,4 +130,162 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, u32 pc) {
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return pc;
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}
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const Sampler& ShaderIR::GetSampler(const Tegra::Shader::Sampler& sampler, TextureType type,
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bool is_array, bool is_shadow) {
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const auto offset = static_cast<std::size_t>(sampler.index.Value());
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// If this sampler has already been used, return the existing mapping.
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const auto itr =
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std::find_if(used_samplers.begin(), used_samplers.end(),
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[&](const Sampler& entry) { return entry.GetOffset() == offset; });
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if (itr != used_samplers.end()) {
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ASSERT(itr->GetType() == type && itr->IsArray() == is_array &&
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itr->IsShadow() == is_shadow);
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return *itr;
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}
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// Otherwise create a new mapping for this sampler
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const std::size_t next_index = used_samplers.size();
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const Sampler entry{offset, next_index, type, is_array, is_shadow};
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return *used_samplers.emplace(entry).first;
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}
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void ShaderIR::WriteTexsInstructionFloat(BasicBlock& bb, Tegra::Shader::Instruction instr,
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Node texture) {
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// TEXS has two destination registers and a swizzle. The first two elements in the swizzle
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// go into gpr0+0 and gpr0+1, and the rest goes into gpr28+0 and gpr28+1
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MetaComponents meta;
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std::array<Node, 4> dest;
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std::size_t written_components = 0;
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for (u32 component = 0; component < 4; ++component) {
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if (!instr.texs.IsComponentEnabled(component)) {
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continue;
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}
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meta.components_map[written_components] = static_cast<u32>(component);
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if (written_components < 2) {
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// Write the first two swizzle components to gpr0 and gpr0+1
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dest[written_components] = GetRegister(instr.gpr0.Value() + written_components % 2);
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} else {
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ASSERT(instr.texs.HasTwoDestinations());
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// Write the rest of the swizzle components to gpr28 and gpr28+1
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dest[written_components] = GetRegister(instr.gpr28.Value() + written_components % 2);
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}
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++written_components;
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}
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std::generate(dest.begin() + written_components, dest.end(), [&]() { return GetRegister(RZ); });
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bb.push_back(Operation(OperationCode::AssignComposite, meta, texture, dest[0], dest[1], dest[2],
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dest[3]));
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}
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Node ShaderIR::GetTextureCode(Instruction instr, TextureType texture_type,
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TextureProcessMode process_mode, bool depth_compare, bool is_array,
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std::size_t bias_offset, std::vector<Node>&& coords) {
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UNIMPLEMENTED_IF_MSG(
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(texture_type == TextureType::Texture3D && (is_array || depth_compare)) ||
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(texture_type == TextureType::TextureCube && is_array && depth_compare),
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"This method is not supported.");
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const auto& sampler = GetSampler(instr.sampler, texture_type, is_array, depth_compare);
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const bool lod_needed = process_mode == TextureProcessMode::LZ ||
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process_mode == TextureProcessMode::LL ||
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process_mode == TextureProcessMode::LLA;
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const bool gl_lod_supported =
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!((texture_type == TextureType::Texture2D && is_array && depth_compare) ||
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(texture_type == TextureType::TextureCube && !is_array && depth_compare));
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const OperationCode read_method =
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lod_needed && gl_lod_supported ? OperationCode::F4TextureLod : OperationCode::F4Texture;
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const MetaTexture meta{sampler, static_cast<u32>(coords.size())};
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std::vector<Node> params = std::move(coords);
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if (process_mode != TextureProcessMode::None) {
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if (process_mode == TextureProcessMode::LZ) {
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if (gl_lod_supported) {
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params.push_back(Immediate(0));
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} else {
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// Lod 0 is emulated by a big negative bias in scenarios that are not supported by
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// GLSL
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params.push_back(Immediate(-1000));
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}
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} else {
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// If present, lod or bias are always stored in the register indexed by the gpr20 field
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// with an offset depending on the usage of the other registers
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params.push_back(GetRegister(instr.gpr20.Value() + bias_offset));
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}
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}
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return Operation(read_method, meta, std::move(params));
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}
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Node ShaderIR::GetTexsCode(Instruction instr, TextureType texture_type,
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TextureProcessMode process_mode, bool depth_compare, bool is_array) {
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const bool lod_bias_enabled = (process_mode != Tegra::Shader::TextureProcessMode::None &&
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process_mode != Tegra::Shader::TextureProcessMode::LZ);
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const auto [coord_count, total_coord_count] = ValidateAndGetCoordinateElement(
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texture_type, depth_compare, is_array, lod_bias_enabled, 4, 4);
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// If enabled arrays index is always stored in the gpr8 field
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const u64 array_register = instr.gpr8.Value();
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// First coordinate index is stored in gpr8 field or (gpr8 + 1) when arrays are used
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const u64 coord_register = array_register + (is_array ? 1 : 0);
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const u64 last_coord_register =
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(is_array || !(lod_bias_enabled || depth_compare) || (coord_count > 2))
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? static_cast<u64>(instr.gpr20.Value())
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: coord_register + 1;
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std::vector<Node> coords;
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for (std::size_t i = 0; i < coord_count; ++i) {
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const bool last = (i == (coord_count - 1)) && (coord_count > 1);
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coords.push_back(GetRegister(last ? last_coord_register : coord_register + i));
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}
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if (depth_compare) {
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// Depth is always stored in the register signaled by gpr20
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// or in the next register if lod or bias are used
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const u64 depth_register = instr.gpr20.Value() + (lod_bias_enabled ? 1 : 0);
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coords.push_back(GetRegister(depth_register));
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}
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if (is_array) {
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coords.push_back(
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Operation(OperationCode::ICastFloat, NO_PRECISE, GetRegister(array_register)));
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}
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// Fill ignored coordinates
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while (coords.size() < total_coord_count) {
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coords.push_back(Immediate(0));
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}
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return GetTextureCode(instr, texture_type, process_mode, depth_compare, is_array,
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(coord_count > 2 ? 1 : 0), std::move(coords));
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}
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std::tuple<std::size_t, std::size_t> ShaderIR::ValidateAndGetCoordinateElement(
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TextureType texture_type, bool depth_compare, bool is_array, bool lod_bias_enabled,
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std::size_t max_coords, std::size_t max_inputs) {
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const std::size_t coord_count = GetCoordCount(texture_type);
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std::size_t total_coord_count = coord_count + (is_array ? 1 : 0) + (depth_compare ? 1 : 0);
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const std::size_t total_reg_count = total_coord_count + (lod_bias_enabled ? 1 : 0);
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if (total_coord_count > max_coords || total_reg_count > max_inputs) {
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UNIMPLEMENTED_MSG("Unsupported Texture operation");
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total_coord_count = std::min(total_coord_count, max_coords);
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}
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// 1D.DC OpenGL is using a vec3 but 2nd component is ignored later.
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total_coord_count +=
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(depth_compare && !is_array && texture_type == TextureType::Texture1D) ? 1 : 0;
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return {coord_count, total_coord_count};
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}
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} // namespace VideoCommon::Shader
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@ -675,6 +675,24 @@ private:
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/// Returns a condition code evaluated from internal flags
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Node GetConditionCode(Tegra::Shader::ConditionCode cc);
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/// Accesses a texture sampler
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const Sampler& GetSampler(const Tegra::Shader::Sampler& sampler,
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Tegra::Shader::TextureType type, bool is_array, bool is_shadow);
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void WriteTexsInstructionFloat(BasicBlock& bb, Tegra::Shader::Instruction instr, Node texture);
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Node GetTexsCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
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Tegra::Shader::TextureProcessMode process_mode, bool depth_compare,
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bool is_array);
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std::tuple<std::size_t, std::size_t> ValidateAndGetCoordinateElement(
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Tegra::Shader::TextureType texture_type, bool depth_compare, bool is_array,
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bool lod_bias_enabled, std::size_t max_coords, std::size_t max_inputs);
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Node GetTextureCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type,
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Tegra::Shader::TextureProcessMode process_mode, bool depth_compare,
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bool is_array, std::size_t bias_offset, std::vector<Node>&& coords);
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template <typename... T>
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inline Node Operation(OperationCode code, const T*... operands) {
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return StoreNode(OperationNode(code, operands...));
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