Merge pull request #2959 from ReinUsesLisp/cbuf-hsetp2
shader/half_set_predicate: Fix HSETP2 for constant buffers
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commit
971870b89d
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@ -4,6 +4,7 @@
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/shader/node_helper.h"
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#include "video_core/shader/shader_ir.h"
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@ -18,7 +19,7 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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DEBUG_ASSERT(instr.hsetp2.ftz == 0);
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LOG_DEBUG(HW_GPU, "ftz={}", static_cast<u32>(instr.hsetp2.ftz));
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hsetp2.type_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a);
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@ -32,6 +33,8 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
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h_and = instr.hsetp2.cbuf_and_imm.h_and;
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op_b = GetOperandAbsNegHalf(GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset()),
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instr.hsetp2.cbuf.abs_b, instr.hsetp2.cbuf.negate_b);
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// F32 is hardcoded in hardware
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op_b = UnpackHalfFloat(std::move(op_b), Tegra::Shader::HalfType::F32);
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break;
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case OpCode::Id::HSETP2_IMM:
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cond = instr.hsetp2.cbuf_and_imm.cond;
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