111 lines
3.6 KiB
C++
111 lines
3.6 KiB
C++
// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "core/core.h"
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#include "core/memory.h"
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#include "video_core/dma_pusher.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/gpu.h"
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namespace Tegra {
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DmaPusher::DmaPusher(GPU& gpu) : gpu(gpu) {}
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DmaPusher::~DmaPusher() = default;
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void DmaPusher::DispatchCalls() {
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// On entering GPU code, assume all memory may be touched by the ARM core.
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gpu.Maxwell3D().dirty_flags.OnMemoryWrite();
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while (Core::System::GetInstance().IsPoweredOn()) {
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if (!Step()) {
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break;
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}
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}
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}
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bool DmaPusher::Step() {
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if (dma_get != dma_put) {
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// Push buffer non-empty, read a word
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const CommandHeader command_header{
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Memory::Read32(*gpu.MemoryManager().GpuToCpuAddress(dma_get))};
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dma_get += sizeof(u32);
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if (!non_main) {
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dma_mget = dma_get;
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}
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// now, see if we're in the middle of a command
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if (dma_state.length_pending) {
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// Second word of long non-inc methods command - method count
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dma_state.length_pending = 0;
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dma_state.method_count = command_header.method_count_;
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} else if (dma_state.method_count) {
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// Data word of methods command
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CallMethod(command_header.argument);
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if (!dma_state.non_incrementing) {
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dma_state.method++;
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}
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if (dma_increment_once) {
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dma_state.non_incrementing = true;
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}
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dma_state.method_count--;
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} else {
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// No command active - this is the first word of a new one
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switch (command_header.mode) {
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case SubmissionMode::Increasing:
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SetState(command_header);
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dma_state.non_incrementing = false;
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dma_increment_once = false;
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break;
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case SubmissionMode::NonIncreasing:
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SetState(command_header);
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dma_state.non_incrementing = true;
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dma_increment_once = false;
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break;
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case SubmissionMode::Inline:
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dma_state.method = command_header.method;
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dma_state.subchannel = command_header.subchannel;
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CallMethod(command_header.arg_count);
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dma_state.non_incrementing = true;
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dma_increment_once = false;
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break;
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case SubmissionMode::IncreaseOnce:
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SetState(command_header);
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dma_state.non_incrementing = false;
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dma_increment_once = true;
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break;
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}
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}
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} else if (ib_enable && !dma_pushbuffer.empty()) {
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// Current pushbuffer empty, but we have more IB entries to read
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const CommandListHeader& command_list_header{dma_pushbuffer.front()};
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dma_get = command_list_header.addr;
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dma_put = dma_get + command_list_header.size * sizeof(u32);
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non_main = command_list_header.is_non_main;
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dma_pushbuffer.pop();
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} else {
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// Otherwise, pushbuffer empty and IB empty or nonexistent - nothing to do
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return {};
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}
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return true;
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}
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void DmaPusher::SetState(const CommandHeader& command_header) {
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dma_state.method = command_header.method;
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dma_state.subchannel = command_header.subchannel;
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dma_state.method_count = command_header.method_count;
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}
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void DmaPusher::CallMethod(u32 argument) const {
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gpu.CallMethod({dma_state.method, argument, dma_state.subchannel, dma_state.method_count});
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}
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} // namespace Tegra
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