shader: Implement TXD
This commit is contained in:
parent
d5bfc63088
commit
630273b629
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@ -133,6 +133,7 @@ add_library(shader_recompiler STATIC
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frontend/maxwell/translate/impl/texture_fetch_swizzled.cpp
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frontend/maxwell/translate/impl/texture_fetch_swizzled.cpp
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frontend/maxwell/translate/impl/texture_gather_swizzled.cpp
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frontend/maxwell/translate/impl/texture_gather_swizzled.cpp
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frontend/maxwell/translate/impl/texture_gather.cpp
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frontend/maxwell/translate/impl/texture_gather.cpp
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frontend/maxwell/translate/impl/texture_gradient.cpp
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frontend/maxwell/translate/impl/texture_load_swizzled.cpp
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frontend/maxwell/translate/impl/texture_load_swizzled.cpp
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frontend/maxwell/translate/impl/texture_load.cpp
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frontend/maxwell/translate/impl/texture_load.cpp
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frontend/maxwell/translate/impl/texture_mipmap_level.cpp
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frontend/maxwell/translate/impl/texture_mipmap_level.cpp
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@ -261,8 +261,8 @@ INST(TLDS, "TLDS", "1101 -01- ---- ----")
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INST(TMML, "TMML", "1101 1111 0101 1---")
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INST(TMML, "TMML", "1101 1111 0101 1---")
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INST(TMML_b, "TMML (b)", "1101 1111 0110 0---")
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INST(TMML_b, "TMML (b)", "1101 1111 0110 0---")
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INST(TXA, "TXA", "1101 1111 0100 0---")
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INST(TXA, "TXA", "1101 1111 0100 0---")
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INST(TXD, "TXD", "1101 1110 0011 10--")
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INST(TXD, "TXD", "1101 1110 00-- ----")
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INST(TXD_b, "TXD (b)", "1101 1110 0111 10--")
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INST(TXD_b, "TXD (b)", "1101 1110 01-- ----")
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INST(TXQ, "TXQ", "1101 1111 0100 1---")
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INST(TXQ, "TXQ", "1101 1111 0100 1---")
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INST(TXQ_b, "TXQ (b)", "1101 1111 0101 0---")
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INST(TXQ_b, "TXQ (b)", "1101 1111 0101 0---")
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INST(VABSDIFF, "VABSDIFF", "0101 0100 ---- ----")
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INST(VABSDIFF, "VABSDIFF", "0101 0100 ---- ----")
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@ -317,14 +317,6 @@ void TranslatorVisitor::TXA(u64) {
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ThrowNotImplemented(Opcode::TXA);
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ThrowNotImplemented(Opcode::TXA);
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}
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}
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void TranslatorVisitor::TXD(u64) {
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ThrowNotImplemented(Opcode::TXD);
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}
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void TranslatorVisitor::TXD_b(u64) {
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ThrowNotImplemented(Opcode::TXD_b);
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}
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void TranslatorVisitor::VABSDIFF(u64) {
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void TranslatorVisitor::VABSDIFF(u64) {
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ThrowNotImplemented(Opcode::VABSDIFF);
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ThrowNotImplemented(Opcode::VABSDIFF);
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}
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}
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@ -0,0 +1,180 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <optional>
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/ir/modifiers.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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namespace {
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enum class TextureType : u64 {
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_1D,
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ARRAY_1D,
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_2D,
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ARRAY_2D,
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_3D,
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ARRAY_3D,
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CUBE,
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ARRAY_CUBE,
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};
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Shader::TextureType GetType(TextureType type, bool dc) {
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switch (type) {
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case TextureType::_1D:
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return dc ? Shader::TextureType::Shadow1D : Shader::TextureType::Color1D;
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case TextureType::ARRAY_1D:
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return dc ? Shader::TextureType::ShadowArray1D : Shader::TextureType::ColorArray1D;
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case TextureType::_2D:
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return dc ? Shader::TextureType::Shadow2D : Shader::TextureType::Color2D;
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case TextureType::ARRAY_2D:
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return dc ? Shader::TextureType::ShadowArray2D : Shader::TextureType::ColorArray2D;
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case TextureType::_3D:
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return dc ? Shader::TextureType::Shadow3D : Shader::TextureType::Color3D;
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case TextureType::ARRAY_3D:
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throw NotImplementedException("3D array texture type");
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case TextureType::CUBE:
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return dc ? Shader::TextureType::ShadowCube : Shader::TextureType::ColorCube;
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case TextureType::ARRAY_CUBE:
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return dc ? Shader::TextureType::ShadowArrayCube : Shader::TextureType::ColorArrayCube;
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}
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throw NotImplementedException("Invalid texture type {}", type);
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}
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IR::Value MakeOffset(TranslatorVisitor& v, IR::Reg reg, bool has_lod_clamp) {
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const IR::U32 value{v.X(reg)};
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const u32 base = has_lod_clamp ? 12 : 16;
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return v.ir.CompositeConstruct(
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v.ir.BitFieldExtract(value, v.ir.Imm32(base), v.ir.Imm32(4), true),
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v.ir.BitFieldExtract(value, v.ir.Imm32(base + 4), v.ir.Imm32(4), true));
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}
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void Impl(TranslatorVisitor& v, u64 insn, bool is_bindless) {
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union {
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u64 raw;
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BitField<49, 1, u64> nodep;
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BitField<35, 1, u64> aoffi;
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BitField<50, 1, u64> lc;
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BitField<51, 3, IR::Pred> sparse_pred;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<8, 8, IR::Reg> coord_reg;
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BitField<20, 8, IR::Reg> derivate_reg;
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BitField<28, 3, TextureType> type;
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BitField<31, 4, u64> mask;
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BitField<36, 13, u64> cbuf_offset;
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} const txd{insn};
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const bool has_lod_clamp = txd.lc != 0;
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if (has_lod_clamp) {
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throw NotImplementedException("TXD.LC - CLAMP is not implemented");
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}
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IR::Value coords;
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u32 num_derivates;
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IR::Reg base_reg = txd.coord_reg;
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IR::Reg last_reg;
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IR::Value handle;
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if (!is_bindless) {
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handle = v.ir.Imm32(static_cast<u32>(txd.cbuf_offset.Value() * 4));
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} else {
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handle = v.X(base_reg++);
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}
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const auto read_array{[&]() -> IR::F32 {
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return v.ir.ConvertUToF(32, 16,
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v.ir.BitFieldExtract(v.X(last_reg), v.ir.Imm32(0),
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v.ir.Imm32(has_lod_clamp ? 12 : 16)));
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}};
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switch (txd.type) {
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case TextureType::_1D: {
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coords = v.F(base_reg);
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num_derivates = 1;
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last_reg = base_reg + 1;
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break;
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}
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case TextureType::ARRAY_1D: {
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last_reg = base_reg + 1;
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coords = v.ir.CompositeConstruct(v.F(base_reg), read_array());
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num_derivates = 1;
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break;
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}
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case TextureType::_2D: {
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last_reg = base_reg + 2;
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coords = v.ir.CompositeConstruct(v.F(base_reg), v.F(base_reg + 1));
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num_derivates = 2;
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break;
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}
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case TextureType::ARRAY_2D: {
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last_reg = base_reg + 2;
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coords = v.ir.CompositeConstruct(v.F(base_reg), v.F(base_reg + 1), read_array());
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num_derivates = 2;
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break;
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}
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default:
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throw NotImplementedException("Invalid texture type");
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}
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const IR::Reg derivate_reg{txd.derivate_reg};
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IR::Value derivates;
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switch (num_derivates) {
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case 1: {
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derivates = v.ir.CompositeConstruct(v.F(derivate_reg), v.F(derivate_reg + 1));
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break;
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}
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case 2: {
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derivates = v.ir.CompositeConstruct(v.F(derivate_reg), v.F(derivate_reg + 1),
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v.F(derivate_reg + 2), v.F(derivate_reg + 3));
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break;
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}
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default:
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throw NotImplementedException("Invalid texture type");
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}
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IR::Value offset;
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if (txd.aoffi != 0) {
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offset = MakeOffset(v, last_reg, has_lod_clamp);
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}
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IR::F32 lod_clamp;
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if (has_lod_clamp) {
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const IR::F32 conv4_8fixp_f = v.ir.Imm32(Common::BitCast<f32>(0x3b800000U));
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const IR::F32 tmp = v.ir.ConvertUToF(
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32, 16, v.ir.BitFieldExtract(v.X(last_reg), v.ir.Imm32(20), v.ir.Imm32(12)));
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lod_clamp = v.ir.FPMul(tmp, conv4_8fixp_f);
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}
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IR::TextureInstInfo info{};
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info.type.Assign(GetType(txd.type, false));
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info.num_derivates.Assign(num_derivates);
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info.has_lod_clamp.Assign(has_lod_clamp ? 1 : 0);
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const IR::Value sample{[&]() -> IR::Value {
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return v.ir.ImageGradient(handle, coords, derivates, offset, lod_clamp, info);
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}()};
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IR::Reg dest_reg{txd.dest_reg};
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for (size_t element = 0; element < 4; ++element) {
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if (((txd.mask >> element) & 1) == 0) {
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continue;
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}
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v.F(dest_reg, IR::F32{v.ir.CompositeExtract(sample, element)});
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++dest_reg;
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}
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if (txd.sparse_pred != IR::Pred::PT) {
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v.ir.SetPred(txd.sparse_pred, v.ir.LogicalNot(v.ir.GetSparseFromOp(sample)));
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}
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}
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} // Anonymous namespace
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void TranslatorVisitor::TXD(u64 insn) {
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Impl(*this, insn, false);
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}
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void TranslatorVisitor::TXD_b(u64 insn) {
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Impl(*this, insn, true);
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}
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} // namespace Shader::Maxwell
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