d95d4ac843
shader/memory: Implement ATOM.ADD
...
ATOM operates atomically on global memory. For now only add ATOM.ADD
since that's what was found in commercial games.
This asserts for ATOM.ADD.S32 (handling the others as unimplemented),
although ATOM.ADD.U32 shouldn't be any different.
This change forces us to change the default type on SPIR-V storage
buffers from float to uint. We could also alias the buffers, but it's
simpler for now to just use uint. While we are at it, abstract the code
to avoid repetition.
2020-01-26 01:54:24 -03:00
b97608ca64
Shader_IR: Allow constant access of guest driver.
2020-01-24 16:43:30 -04:00
c921e496eb
GPU: Implement guest driver profile and deduce texture handler sizes.
2020-01-24 16:43:29 -04:00
5a077c95ce
Merge pull request #3322 from ReinUsesLisp/vk-front-face
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vk_graphics_pipeline: Set front facing properly
2020-01-19 23:22:34 -05:00
94915d4ea1
vk_graphics_pipeline: Set front facing properly
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Front face was being forced to a certain value when cull face is
disabled. Set a default value on initialization and drop the forcefully
set front facing value with culling disabled.
2020-01-18 18:50:47 -03:00
9bf4850f74
Merge pull request #3305 from ReinUsesLisp/point-size-program
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gl_state: Implement PROGRAM_POINT_SIZE
2020-01-18 01:56:32 -05:00
63ba41a26d
shader/memory: Implement ATOMS.ADD.U32
2020-01-16 17:30:55 -03:00
9e874898f5
maxwell_3d: Make dirty_pointers private
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This isn't used outside of the class itself, so we can make it private
for the time being.
2020-01-16 04:07:15 -05:00
c375d735e6
gl_state: Implement PROGRAM_POINT_SIZE
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For gl_PointSize to have effect we have to activate
GL_PROGRAM_POINT_SIZE.
2020-01-15 16:14:17 -03:00
0d6d8129c4
yuzu: Remove Maxwell debugger
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This was carried from Citra and wasn't really used on yuzu. It also adds
some runtime overhead. This commit removes it from yuzu's codebase.
2020-01-02 23:09:44 -03:00
028b2718ed
Merge pull request #3239 from ReinUsesLisp/p2r
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shader/p2r: Implement P2R Pr
2019-12-31 20:37:16 -05:00
8a76f816a4
Merge pull request #3228 from ReinUsesLisp/ptp
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shader/texture: Implement AOFFI and PTP for TLD4 and TLD4S
2019-12-26 21:43:44 -05:00
5619d24377
Merge pull request #3244 from ReinUsesLisp/vk-fps
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fixed_pipeline_state: Define structure and loaders
2019-12-25 14:31:29 -04:00
4af569ee47
Merge pull request #3236 from ReinUsesLisp/rasterize-enable
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gl_rasterizer: Implement RASTERIZE_ENABLE
2019-12-24 22:54:10 -05:00
5770418fb3
maxwell_3d: Add depth bounds registers
2019-12-22 22:55:06 -03:00
cf27b59493
shader/r2p: Refactor P2R to support P2R
2019-12-20 17:55:42 -03:00
da0aa4da6b
gl_rasterizer: Implement RASTERIZE_ENABLE
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RASTERIZE_ENABLE is the opposite of GL_RASTERIZER_DISCARD. Implement it
naturally using this.
NVN games expect rasterize to be enabled by default, reflect that in our
initial GPU state.
2019-12-18 19:28:23 -03:00
8b26b4228b
shader_bytecode: Fix TLD4S encoding
2019-12-17 23:32:10 -03:00
e09c1fbc1f
shader/texture: Implement TLD4.PTP
2019-12-16 04:09:24 -03:00
af89723fa3
Shader_Ir: Correct TLD4S encoding and implement f16 flag.
2019-12-11 19:53:17 -04:00
1a66cde175
Merge pull request #3210 from ReinUsesLisp/memory-barrier
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shader: Implement MEMBAR.GL
2019-12-11 14:24:39 -05:00
7ffb672f61
Maxwell3D: Implement Depth Mode.
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This commit finishes adding depth mode that was reverted before due to
other unresolved issues.
2019-12-10 19:51:46 -04:00
425a254fa2
shader: Implement MEMBAR.GL
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Implement using memoryBarrier in GLSL and OpMemoryBarrier on SPIR-V.
2019-12-10 16:45:03 -03:00
6233b1db08
shader_ir/memory: Implement patch stores
2019-12-09 23:25:21 -03:00
36651f215a
maxwell_3d: Add tessellation tess level registers
2019-12-06 22:08:22 -03:00
707bf41c6f
maxwell_3d: Add tessellation mode register
2019-12-06 22:07:31 -03:00
d2b50c5ebd
maxwell_3d: Add patch vertices register
2019-12-06 22:06:53 -03:00
74f515e8b6
shader_bytecode: Remove corrupted character
2019-12-06 20:31:56 -03:00
e36814d6d5
Merge pull request #3109 from FernandoS27/new-instr
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Implement FLO & TXD Instructions on GPU Shaders
2019-12-06 18:18:16 -05:00
b03242067d
Merge pull request #3098 from ReinUsesLisp/shader-invalidations
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gl_shader_cache: Miscellaneous changes to shaders
2019-11-24 19:36:30 -05:00
b7031b2b9d
Merge pull request #3105 from ReinUsesLisp/fix-stencil-reg
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maxwell_3d: Fix stencil_back_func_mask offset
2019-11-24 13:53:23 -05:00
180417c514
gl_shader_cache: Remove dynamic BaseBinding specialization
2019-11-22 21:28:49 -03:00
c8a48aacc0
video_core: Unify ProgramType and ShaderStage into ShaderType
2019-11-22 21:28:48 -03:00
287ae2b9e8
gl_shader_cache: Specialize local memory size for compute shaders
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Local memory size in compute shaders was stubbed with an arbitary size.
This commit specializes local memory size from guest GPU parameters.
2019-11-22 21:28:48 -03:00
4f5d8e4342
gl_shader_cache: Specialize shader workgroup
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Drop the usage of ARB_compute_variable_group_size and specialize compute
shaders instead. This permits compute to run on AMD and Intel
proprietary drivers.
2019-11-22 21:28:47 -03:00
80eacdf89b
texture_cache: Use a table instead of switch for texture formats
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Use a large flat array to look up texture formats. This allows us to
properly implement formats with different component types. It should
also be faster.
2019-11-14 20:57:10 -03:00
cd0f5dfc17
Shader_IR: Implement TXD instruction.
2019-11-14 11:15:27 -04:00
f3d1b370aa
Shader_IR: Implement FLO instruction.
2019-11-14 11:15:27 -04:00
95137a04e1
Shader_Bytecode: Add encodings for FLO, SHF and TXD
2019-11-14 11:15:26 -04:00
b6f6733131
Merge pull request #3081 from ReinUsesLisp/fswzadd-shuffles
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shader: Implement FSWZADD and reimplement SHFL
2019-11-14 10:27:27 -04:00
7990220df7
maxwell_3d: Fix stencil_back_func_mask offset
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stencil_back_func_mask and stencil_back_mask were misplaced. This commit
addresses that issue.
2019-11-13 16:35:17 -03:00
096f339a2a
video_core: Silence implicit conversion warnings
2019-11-08 22:48:50 +00:00
56e237d1f9
shader_ir/warp: Implement FSWZADD
2019-11-07 20:08:41 -03:00
21e07df7b7
Merge pull request #2914 from FernandoS27/fermi-fix
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Fermi2D: limit blit area to only available area
2019-11-05 20:45:24 -05:00
1bdae0fe29
common_func: Use std::array for INSERT_PADDING_* macros.
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- Zero initialization here is useful for determinism.
2019-11-03 22:22:41 -05:00
658489ebf7
Merge pull request #3050 from FernandoS27/fix-tld4
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shader_ir: Fix TLD4 and add bindless variant
2019-10-30 18:37:17 +00:00
9293c3a0f2
Shader_IR: Fix TLD4 and add Bindless Variant.
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This commit fixes an issue where not all 4 results of tld4 were being
written, the color component was defaulted to red, among other things.
It also implements the bindless variant.
2019-10-30 12:02:03 -04:00
fa31e5b868
maxwell_3d/kepler_compute: Remove unused arguments in GetTexture
2019-10-28 00:23:42 -03:00
538ddd220e
video_core/textures: Remove unused index entry in FullTextureInfo
2019-10-28 00:14:38 -03:00
961fe4d19b
maxwell_3d: Remove unused method GetStageTextures
2019-10-28 00:14:29 -03:00
3e469cecc1
maxwell_3d: Silence implicit conversion warnings
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While we are at it, unify types for dirty reg pointers.
2019-10-27 15:22:17 -03:00
be856a38d6
Shader_IR: Address Feedback.
2019-10-26 15:38:30 -04:00
e3afd6595a
Shader_IR: Clang format
2019-10-25 09:01:32 -04:00
ec85648af3
gl_shader_disk_cache: Store and load fast BRX
2019-10-25 09:01:31 -04:00
33fcec3502
Shader_IR: allow lookup of texture samplers within the shader_ir for instructions that don't provide it
2019-10-25 09:01:30 -04:00
1a58f45d76
VideoCore: Unify const buffer accessing along engines and provide ConstBufferLocker class to shaders.
2019-10-25 09:01:29 -04:00
7fdf991097
shader_bytecode: Make Matcher constexpr capable
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Greatly shrinks the amount of generated code for GetDecodeTable().
Collapses an assembly output of 9000+ lines down to ~3621 with Clang,
and 6513 down to ~2616 with GCC, given it's now allowed to construct all
the entries as a sequence of constant data.
2019-10-24 01:10:10 -04:00
e3107788e6
maxwell_3d: Reduce FlushMMEInlineDraw logging to Trace
2019-10-20 03:43:17 -03:00
c0eb1aecfd
Fermi2D: Use a different formula for delimiting blit areas.
2019-10-17 18:21:01 -04:00
57a46c69f1
Fermi2D: limit blit area to only available area
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Normaly OpenGL does not care if the areas exceed the texture regions but
other backends such as Vulkan do care about the limits of this areas.
This PR crops the areas of the blit in order that they don't surpass the
limits of the textures. This should help Vulkan and faulty OpenGL
drivers
2019-10-17 10:38:44 -04:00
c9c75f9587
maxwell_3d: Silence truncation warnings
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A trivial warning caused by not using size_t as the argument types
instead of u32.
2019-10-15 17:51:35 -04:00
fe7f20e659
maxwell_3d: Add dirty flags for depth bounds values
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This is useful in Vulkan where we want to update depth bounds without
caring if it's enabled or disabled through vkCmdSetDepthBounds.
2019-10-05 04:07:47 +00:00
376f1a4432
Merge pull request #2869 from ReinUsesLisp/suld
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shader/image: Implement SULD and fix SUATOM
2019-09-23 21:47:03 -04:00
9d69206cd0
Merge pull request #2870 from FernandoS27/multi-draw
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Implement a MME Draw commands Inliner and correct host instance drawing
2019-09-22 23:13:02 +10:00
68f5aff64f
Maxwell3D: Corrections and refactors to MME instance refactor
2019-09-22 07:23:13 -04:00
01fc969a5f
Fix clang-format
2019-09-22 02:21:56 +02:00
366e900376
fermi_2d: Lower surface copy log severity to DEBUG
2019-09-22 02:18:57 +02:00
9286976948
Merge pull request #2878 from FernandoS27/icmp
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shader_ir: Implement ICMP
2019-09-21 18:06:07 -03:00
44000971e2
gl_shader_decompiler: Use uint for images and fix SUATOM
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In the process remove implementation of SUATOM.MIN and SUATOM.MAX as
these require a distinction between U32 and S32. These have to be
implemented with imageCompSwap loop.
2019-09-21 17:33:52 -03:00
675f23aedc
shader/image: Implement SULD and remove irrelevant code
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* Implement SULD as float.
* Remove conditional declaration of GL_ARB_shader_viewport_layer_array.
2019-09-21 17:32:48 -03:00
4de0f1e1c8
shader_bytecode: Add SULD encoding
2019-09-21 17:31:46 -03:00
527b841c15
Shader_IR: ICMP corrections and fixes
2019-09-21 14:28:03 -04:00
01a4afee42
Mark DrawArrays as LOG_TRACE
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There's no reason to clog logs with DrawArray.
2019-09-21 15:43:58 +10:00
4b81d19a1a
Shader_IR: Implement ICMP.
2019-09-19 20:56:29 -04:00
7761e44d18
Rasterizer: Refactor and simplify DrawBatch Interface.
2019-09-19 11:41:33 -04:00
7606da5611
VideoCore: Corrections to the MME Inliner and removal of hacky instance management.
2019-09-19 11:41:29 -04:00
ba02d564f8
Video Core: initial Implementation of InstanceDraw Packaging
2019-09-19 11:41:27 -04:00
0526bf1895
shader_ir/warp: Implement SHFL
2019-09-17 17:44:07 -03:00
393cc3ef2f
Merge pull request #2851 from ReinUsesLisp/srgb
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renderer_opengl: Fix sRGB blits
2019-09-15 10:38:10 -04:00
b8b1747704
Merge pull request #2824 from ReinUsesLisp/mme
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Revert "Revert #2466 " and stub FirmwareCall 4
2019-09-15 06:17:04 -04:00
193bfefce4
maxwell_3d: Update firmware 4 call stub commentary
2019-09-14 22:51:18 -03:00
36abf67e79
shader/image: Implement SUATOM and fix SUST
2019-09-10 20:22:31 -03:00
78574746bd
renderer_opengl: Fix sRGB blits
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Removes the sRGB hack of tracking if a frame used an sRGB rendertarget
to apply at least once to blit the final texture as sRGB. Instead of
doing this apply sRGB if the presented image has sRGB.
Also enable sRGB by default on Maxwell3D registers as some games seem to
assume this.
2019-09-10 19:31:42 -03:00
34b2c60f95
Merge pull request #2823 from ReinUsesLisp/shr-clamp
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shader/shift: Implement SHR wrapped and clamped variants
2019-09-10 11:56:17 -04:00
c7ec7bc1f5
Merge pull request #2810 from ReinUsesLisp/mme-opt
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maxwell_3d: Avoid moving macro_params
2019-09-10 11:55:45 -04:00
6170337001
gl_rasterizer: Implement image bindings
2019-09-05 20:35:51 -03:00
3a450c1395
kepler_compute: Implement texture queries
2019-09-05 20:35:51 -03:00
5f309b88db
Revert "Revert #2466 " and stub FirmwareCall 4
2019-09-04 01:55:45 -03:00
77ef4fa907
shader/shift: Implement SHR wrapped and clamped variants
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Nvidia defaults to wrapped shifts, but this is undefined behaviour on
OpenGL's spec. Explicitly mask/clamp according to what the guest shader
requires.
2019-09-04 01:55:24 -03:00
701dedcfad
maxwell_3d: Avoid moving macro_params
2019-09-04 01:55:01 -03:00
81fbc5370d
Merge pull request #2812 from ReinUsesLisp/f2i-selector
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shader_ir/conversion: Implement F2I and F2F F16 selector
2019-09-03 22:35:33 -04:00
d4f33b822b
Merge pull request #2811 from ReinUsesLisp/fsetp-fix
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float_set_predicate: Add missing negation bit for the second operand
2019-09-03 22:34:34 -04:00
137d165672
Merge pull request #2826 from ReinUsesLisp/macro-binding
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maxwell_3d: Fix macro binding cursor
2019-09-03 22:32:42 -04:00
50b5bb44a0
Merge pull request #2765 from FernandoS27/dma-fix
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MaxwellDMA: Fixes, corrections and relaxations.
2019-09-01 13:13:05 -04:00
52a41f482f
maxwell_3d: Fix macro binding cursor
2019-09-01 05:01:11 -03:00
4d4f9cc104
video_core: Silent miscellaneous warnings ( #2820 )
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* texture_cache/surface_params: Remove unused local variable
* rasterizer_interface: Add missing documentation commentary
* maxwell_dma: Remove unused rasterizer reference
* video_core/gpu: Sort member declaration order to silent -Wreorder warning
* fermi_2d: Remove unused MemoryManager reference
* video_core: Silent unused variable warnings
* buffer_cache: Silent -Wreorder warnings
* kepler_memory: Remove unused MemoryManager reference
* gl_texture_cache: Add missing override
* buffer_cache: Add missing include
* shader/decode: Remove unused variables
2019-08-30 14:08:00 -04:00
e3534700d7
shader_ir/conversion: Split int and float selector and implement F2F H1
2019-08-28 16:09:33 -03:00
b13fbc25b8
shader_ir/conversion: Implement F2I F16 Ra.H1
2019-08-27 23:40:40 -03:00
6207751b00
float_set_predicate: Add missing negation bit for the second operand
2019-08-27 21:57:43 -03:00
4e35177e23
shader_ir: Implement VOTE
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Implement VOTE using Nvidia's intrinsics. Documentation about these can
be found here
https://developer.nvidia.com/reading-between-threads-shader-intrinsics
Instead of using portable ARB instructions I opted to use Nvidia
intrinsics because these are the closest we have to how Tegra X1
hardware renders.
To stub VOTE on non-Nvidia drivers (including nouveau) this commit
simulates a GPU with a warp size of one, returning what is meaningful
for the instruction being emulated:
* anyThreadNV(value) -> value
* allThreadsNV(value) -> value
* allThreadsEqualNV(value) -> true
ballotARB, also known as "uint64_t(activeThreadsNV())", emits
VOTE.ANY Rd, PT, PT;
on nouveau's compiler. This doesn't match exactly to Nvidia's code
VOTE.ALL Rd, PT, PT;
Which is emulated with activeThreadsNV() by this commit. In theory this
shouldn't really matter since .ANY, .ALL and .EQ affect the predicates
(set to PT on those cases) and not the registers.
2019-08-21 14:50:38 -03:00
cedc1aab4a
Merge pull request #2753 from FernandoS27/float-convert
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Shader_Ir: Implement F16 Variants of F2F, F2I, I2F.
2019-08-21 10:27:57 -04:00
2ff8044806
shader_ir: Implement NOP
2019-08-04 03:02:55 -03:00
52f54c728d
Merge pull request #2592 from FernandoS27/sync1
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Implement GPU Synchronization Mechanisms & Correct NVFlinger
2019-07-26 14:26:44 -04:00
a452ff983d
MaxwellDMA: Fixes, corrections and relaxations.
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This commit fixes offsets on Linear -> Tiled copies, corrects z pos
fortiled->linear copies, corrects bytes_per_pixel calculation in tiled
-> linear copies and relaxes some limitations set by latest dma fixes
refactors.
2019-07-25 20:41:42 -04:00
31e8a61527
Merge pull request #2743 from FernandoS27/surpress-assert
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Downgrade and suppress a series of GPU asserts and debug messages.
2019-07-25 12:34:36 -04:00
9be9600bdc
Merge pull request #2704 from FernandoS27/conditional
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maxwell3d: Implement Conditional Rendering
2019-07-24 17:07:57 -04:00
f601f25bcc
Merge pull request #2734 from ReinUsesLisp/compute-shaders
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gl_rasterizer: Implement compute shaders
2019-07-22 11:12:55 -04:00
27e10e0442
Merge pull request #2735 from FernandoS27/pipeline-rework
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Rework Dirty Flags in GPU Pipeline, Optimize CBData and Redo Clearing mechanism
2019-07-21 00:59:52 -04:00
11f4e739bd
Shader_Ir: Implement F16 Variants of F2F, F2I, I2F.
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This commit takes care of implementing the F16 Variants of the
conversion instructions and makes sure conversions are done.
2019-07-20 17:38:25 -04:00
7a35178ee2
Maxwell3D: Reorganize and address feedback
2019-07-20 10:18:35 -04:00
6c4985edc9
shader/half_set_predicate: Implement missing HSETP2 variants
2019-07-19 22:20:47 -03:00
3a3fee5abf
MaxwellDMA/KeplerCopy: Downgrade DMA log message to Trace.
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This log was just to know which games used DMA. It's no longer
important.
2019-07-18 08:31:38 -04:00
4be61013a1
GL_State: Feedback and fixes
2019-07-17 17:29:56 -04:00
5ad889f6fd
Maxwell3D: Address Feedback
2019-07-17 17:29:55 -04:00
8cdbfe69b1
GL_Rasterizer: Corrections to Clearing.
2019-07-17 17:29:54 -04:00
0ff4a5fa39
Maxwell3D: Correct marking dirtiness on CB upload
2019-07-17 17:29:53 -04:00
fec32fed18
GL_Rasterizer: Rework RenderTarget/DepthBuffer clearing
2019-07-17 17:29:52 -04:00
a081dea8ab
Maxwell3D: Implement State Dirty Flags.
2019-07-17 17:29:51 -04:00
0d3db58657
Maxwell3D: Rework CBData Upload
2019-07-17 17:29:50 -04:00
f2e7b29c14
Maxwell3D: Rework the dirty system to be more consistant and scaleable
2019-07-17 17:29:49 -04:00
e42bcf2314
maxwell3d: Implement Conditional Rendering
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Conditional Rendering takes care of conditionaly clearing or drawing
depending on a set of queries. This PR implements the query checks to
stablish if things can be rendered or not.
2019-07-17 17:13:19 -04:00
725ba6cf63
gl_rasterizer: Implement compute shaders
2019-07-15 17:38:25 -03:00
1bdb59fc6e
Merge pull request #2695 from ReinUsesLisp/layer-viewport
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gl_shader_decompiler: Implement gl_ViewportIndex and gl_Layer in vertex shaders
2019-07-15 16:28:07 -04:00
3477b92289
Merge pull request #2675 from ReinUsesLisp/opengl-buffer-cache
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buffer_cache: Implement a generic buffer cache and its OpenGL backend
2019-07-14 19:03:43 -04:00
0ec9da2f9f
Merge pull request #2692 from ReinUsesLisp/tlds-f16
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shader/texture: Add F16 support for TLDS
2019-07-14 08:44:38 -04:00
8a6fc529a9
shader_ir: Implement BRX & BRA.CC
2019-07-09 08:14:37 -04:00
c9d886c84e
gl_shader_decompiler: Implement gl_ViewportIndex and gl_Layer in vertex shaders
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This commit implements gl_ViewportIndex and gl_Layer in vertex and
geometry shaders. In the case it's used in a vertex shader, it requires
ARB_shader_viewport_layer_array. This extension is available on AMD and
Nvidia devices (mesa and proprietary drivers), but not available on
Intel on any platform. At the moment of writing this description I don't
know if this is a hardware limitation or a driver limitation.
In the case that ARB_shader_viewport_layer_array is not available,
writes to these registers on a vertex shader are ignored, with the
appropriate logging.
2019-07-07 20:42:55 -03:00
d0966b9f7c
shader/texture: Add F16 support for TLDS
2019-07-07 16:05:56 -03:00
7ecf64257a
gl_rasterizer: Minor style changes
2019-07-06 00:37:55 -03:00
82b829625b
video_core: Implement GPU side Syncpoints
2019-07-05 15:49:11 -04:00
4d63f97945
shader_bytecode: Include missing <array>
2019-06-24 01:51:02 -03:00
082740d34d
surface: Correct format S8Z24
2019-06-20 21:38:34 -03:00
7232a1ed16
decoders: correct block calculation
2019-06-20 21:38:34 -03:00
cb728797b0
fermi2d: Correct Origin Mode
2019-06-20 21:38:34 -03:00
175aa343ff
texture_cache: Fermi2D reform and implement View Mirage
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This also does some fixes on compressed textures reinterpret and on the
Fermi2D engine in general.
2019-06-20 21:38:33 -03:00
06c4ce8645
shader: Decode SUST and implement backing image functionality
2019-06-20 21:38:33 -03:00
b8c75a845b
maxwell_3d: Partially implement texture buffers as 1D textures
2019-06-20 21:36:12 -03:00
4e81fc8296
shader: Implement texture buffers
2019-06-20 21:36:12 -03:00
d267948a73
texture_cache: loose TryReconstructSurface when accurate GPU is not on.
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Also corrects some asserts.
2019-06-20 21:36:12 -03:00
6bd034eae9
engine_upload: Addapt to new Texture Cache
2019-06-20 21:36:12 -03:00
345e73f2fe
video_core: Use un-shifted block sizes to avoid integer divisions
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Instead of storing all block width, height and depths in their shifted
form:
block_width = 1U << block_shift;
Store them like they are provided by the emulated hardware (their
block_shift form). This way we can avoid doing the costly
Common::AlignUp operation to align texture sizes and drop CPU integer
divisions with bitwise logic (defined in Common::AlignBits).
2019-06-20 21:36:12 -03:00
c7b5c245e1
Merge pull request #2562 from ReinUsesLisp/split-cbuf-upload
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video_core/engines: Move ConstBufferInfo out of Maxwell3D
2019-06-17 22:35:04 -04:00
528c15051c
kepler_compute: Use std::array for cbuf info
2019-06-07 20:36:22 -03:00
17d5fb6d06
kepler_compute: Fix block_dim_x encoding
2019-06-07 20:35:46 -03:00
2f2a61887a
video_core/engines: Move ConstBufferInfo out of Maxwell3D
2019-06-07 19:47:15 -03:00
a32c52b1d8
shader_bytecode: Mark EXIT as flow instruction
2019-06-04 12:18:35 -04:00
75e7b45d69
shader/memory: Implement ST (generic memory)
2019-05-20 22:41:53 -03:00
f78ef617b6
shader/memory: Implement LD (generic memory)
2019-05-20 22:38:59 -03:00
d49efbfb4a
Merge pull request #2441 from ReinUsesLisp/al2p
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shader: Implement AL2P and ALD.PHYS
2019-05-19 14:02:58 -04:00
b54bd3f018
Merge pull request #2472 from FernandoS27/tic
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maxwell_3d: reduce severity of different component formats assert.
2019-05-19 15:04:47 +01:00
3bd5f01240
Merge pull request #2469 from lioncash/copyable
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video_core/engines/maxwell_3d: Add is_trivially_copyable_v check for Regs
2019-05-19 15:02:17 +01:00
a6ed792ac4
Merge pull request #2470 from lioncash/ranged-for
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video_core/engines/maxwell_3d: Simplify for loops into ranged for loops within InitializeRegisterDefaults()
2019-05-19 09:01:19 -05:00
fc975e9021
maxwell_3d: reduce sevirity of different component formats assert.
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This was reduced due to happening on most games and at such constant
rate that it affected performance heavily for the end user. In general,
we are well aware of the assert and an implementation is already
planned.
2019-05-14 17:12:54 -04:00
b01cce716e
video_core/engines/engine_upload: Amend constructor initializer list order
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Silences a -Wreorder warning.
2019-05-14 13:43:28 -04:00
9b6d993e52
video_core/engines/engine_upload: Default destructor in the cpp file
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Avoids inlining destruction logic where applicable, and also makes
forward declarations not cause unexpected compilation errors depending
on where the State class is used.
2019-05-14 13:41:41 -04:00
ec1c69258a
video_core/engines/engine_upload: Remove unnecessary const on parameters in function declarations
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These only apply in the definition of the function. They can be omitted
from the declaration.
2019-05-14 13:40:09 -04:00
0f83c8dffa
video_core/engines/engine_upload: Remove unnecessary includes
2019-05-14 13:39:04 -04:00
5db1b54b58
video_core/engines/maxwell3d: Get rid of three magic values in CallMethod()
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We can use the named constant instead of using 32 directly.
2019-05-14 09:02:47 -04:00
48ce5880a0
video_core/engines/maxwell_3d: Simplify for loops into ranged for loops within InitializeRegisterDefaults()
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Lessens the amount of code that needs to be read, and gets rid of the
need to introduce an indexing variable. Instead, we just operate on the
objects directly.
2019-05-14 08:53:19 -04:00
c212fc9b2c
video_core/engines/maxwell_3d: Add is_trivially_copyable_v check for Regs
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std::memset is used to clear the entire register structure, which
requires that the Regs struct be trivially copyable (otherwise undefined
behavior is invoked). This prevents the case where a non-trivial type is
potentially added to the struct.
2019-05-14 08:47:56 -04:00
c27b81cb85
Merge pull request #2429 from FernandoS27/compute
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Corrections and Implementation on GPU Engines
2019-05-09 13:19:22 -04:00
d4df803b2b
shader_ir/other: Implement IPA.IDX
2019-05-02 21:46:37 -03:00
71aa9d0877
shader_ir/memory: Implement physical input attributes
2019-05-02 21:46:25 -03:00
bd81a03d9d
gl_shader_decompiler: Declare all possible varyings on physical attribute usage
2019-05-02 21:46:25 -03:00
7632a7d6d2
shader_bytecode: Add AL2P decoding
2019-05-02 21:46:25 -03:00
e64c41efe8
Refactors and name corrections.
2019-05-01 15:31:39 -04:00
c52233ec8b
Merge pull request #2322 from ReinUsesLisp/wswitch
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video_core: Silent -Wswitch warnings
2019-04-28 22:24:58 -04:00
b3118ee316
Fixes and Corrections to DMA Engine
2019-04-23 15:28:18 -04:00
f1e5314f1a
Add Swizzle Parameters to the DMA engine
2019-04-23 11:21:00 -04:00
e140e2ebc6
Add Documentation Headers to all the GPU Engines
2019-04-23 08:44:52 -04:00
021d28c9b8
Corrections and styling
2019-04-23 08:02:24 -04:00
701ce1c9d0
Implement Maxwell3D Data Upload
2019-04-22 19:27:36 -04:00
e4ff140b99
Introduce skeleton of the GPU Compute Engine.
2019-04-22 19:05:43 -04:00
a91d3fc639
Revamp Kepler Memory to use a subegine to manage uploads
2019-04-22 18:50:56 -04:00
68b707711a
Merge pull request #2411 from FernandoS27/unsafe-gpu
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GPU Manager: Implement ReadBlockUnsafe and WriteBlockUnsafe
2019-04-22 17:09:00 -04:00
01100f8afd
Merge pull request #2400 from FernandoS27/corret-kepler-mem
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Implement Kepler Memory on both Linear and BlockLinear.
2019-04-22 16:47:05 -04:00
da0c3bc658
Merge pull request #2407 from FernandoS27/f2f
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Do some corrections in conversion shader instructions.
2019-04-20 00:42:34 -04:00
fbe8d1ceaa
video_core: Silent -Wswitch warnings
2019-04-18 15:54:39 -03:00
5bd5140bde
Merge pull request #2348 from FernandoS27/guest-bindless
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Implement Bindless Textures on Shader Decompiler and GL backend
2019-04-17 20:59:49 -04:00
0cfbd3325b
Merge pull request #2315 from ReinUsesLisp/severity-decompiler
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shader_ir/decode: Reduce the severity of common assertions
2019-04-16 22:21:19 -04:00
ef381e6924
Use ReadBlockUnsafe on TIC and TSC reading
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Use ReadBlockUnsafe on TIC and TSC reading as memory is never flushed
from host GPU there.
2019-04-15 23:10:24 -04:00
3e96c367bd
Use WriteBlock and ReadBlock.
2019-04-15 22:42:34 -04:00
bec28d692d
Implement Block Linear copies in Kepler Memory.
2019-04-15 21:22:16 -04:00
aa471274d9
Do some corrections in conversion shader instructions.
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Corrects encodings for I2F, F2F, I2I and F2I
Implements Immediate variants of all four conversion types.
Add assertions to unimplemented stuffs.
2019-04-15 19:16:27 -04:00
8a099ac99f
Correct Kepler Memory on Linear Pushes.
2019-04-15 14:51:36 -04:00
5c280e6ff0
shader_ir: Implement STG, keep track of global memory usage and flush
2019-04-14 00:25:32 -03:00
353a099481
Merge pull request #2366 from FernandoS27/xmad-fix
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Correct XMAD mode, psl and high_b on different encodings.
2019-04-09 19:15:01 -04:00
5c55ae4e18
Correct LOP_IMN encoding
2019-04-08 13:39:12 -04:00
16adc735a5
Correct XMAD mode, psl and high_b on different encodings.
2019-04-08 13:01:17 -04:00
492040bd9c
Move ConstBufferAccessor to Maxwell3d, correct mistakes and clang format.
2019-04-08 11:36:11 -04:00
4841440382
Implement TXQ_B
2019-04-08 11:29:52 -04:00
ac3ba9a33e
Corrections to TEX_B
2019-04-08 11:28:44 -04:00
7af82ca022
Implement Bindless Handling on SetupTexture
2019-04-08 11:23:46 -04:00
e28fd3d0a5
Implement Bindless Samplers and TEX_B in the IR.
2019-04-08 11:23:42 -04:00
ddcb711ee8
maxwell_3d: Reduce severity of ProcessSyncPoint
2019-04-06 02:18:20 -03:00
864280fabc
Merge pull request #2317 from FernandoS27/sync
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Implement SyncPoint Register in the GPU.
2019-04-05 23:50:54 -04:00
fc91e21206
Implement SyncPoint Register in the GPU.
2019-04-05 19:19:30 -04:00
22f02076c6
video_core/engines: Make memory manager members private
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These aren't used externally by anything, so they can be made private
data members.
2019-04-05 18:26:43 -04:00
26223f8124
video_core/engines: Remove unnecessary inclusions where applicable
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Replaces header inclusions with forward declarations where applicable
and also removes unused headers within the cpp file. This reduces a few
more dependencies on core/memory.h
2019-04-05 18:26:32 -04:00
04979560fb
shader_ir/memory: Reduce severity of LD_L cache management and log it
2019-04-03 17:12:44 -03:00
ReinUsesLisp
Fernando Sahmkow
bunnei
Lioncash
David
FearlessTobi
David Marcec
Hexagon12
Sebastian Valle